TMS28F210

65536 BY 16-BIT

FLASH MEMORY

SMJS210D – DECEMBER 1992 – REVISED AUGUST 1997

9

POST OFFICE BOX 1443

algorithm-selection-mode command

The algorithm-selection mode is activated by writing 0090h into the command register. The manufacturer

equivalent code (0097h) is identified by the value read from address location 0000h, and the device equivalent

code (00E5h) is identified by the value read from address location 0001h.

set-up-program/program commands

programming mode, write the set-up-program command, 0040h, into the command register. The programming

operation is invoked by the next write-enable pulse. Addresses are latched internally on the falling edge of W,

and data is latched internally on the rising edge of W. The programming operation begins on the rising edge

of W and ends on the rising edge of the next W pulse. The program operation requires 10

µs for completion

before the program-verify command, 00C0h, can be loaded.

Maximum program timing is controlled by the internal stop timer. When the stop timer terminates the program

operation, the device enters an inactive state and remains inactive until a command is received.

program-verify command

The TMS28F210 can be programmed sequentially or randomly because it is programmed one word at a time.

Each word must be verified after it is programmed. The program-verify operation prepares the device to verify

the most recently programmed word. To invoke the program-verify operation, 00C0h must be written into the

command register. The program-verify operation ends on the rising edge of W.

While verifying a word, the TMS28F210 applies an internal margin voltage to the designated word. If the true

data and programmed data match, programming continues to the next designated word location; otherwise, the

word must be reprogrammed. Figure 1 shows how commands and bus operations are combined for word

programming.

set-up-erase/erase commands

write the set-up-erase command, 0020h, into the command register. After the TMS28F210 is in the erase mode,

writing a second erase command, 0020h, into the command register invokes the erase operation. The erase

operation begins on the rising edge of W and ends on the rising edge of the next W. The erase operation requires

10 ms to complete before the erase-verify command, 00A0h, can be loaded.

Maximum erase timing is controlled by the internal stop timer. When the stop timer terminates the erase

operation, the device enters an inactive state and remains inactive until a command is received.

erase-verify command

All words must be verified following an erase operation. After the erase operation is complete, an erased word

can be verified by writing the erase-verify command, 00A0h, into the command register. This command causes

the device to exit the erase mode on the rising edge of W. The address of the word to be verified is latched on

the falling edge of W. The erase-verify operation remains enabled until a command is written to the command

register.