TMS28F210

65536 BY 16-BIT

FLASH MEMORY

SMJS210D – DECEMBER 1992 – REVISED AUGUST 1997

8

POST OFFICE BOX 1443

programming and erasure

In the erased state, all bits are at a logic 1. Before erasing the device, all memory bits must be programmed to

a logic 0. Afterwards, the entire chip is erased. At this point, the bits, now logic 1s, can be programmed

accordingly. Refer to the Fastwrite and Fasterase algorithms for further detail.

command register

The command register controls the program and erase functions of the TMS28F210. The algorithm-selection

contents of the command register and the function being performed can be changed. The command register

is written to when E is low and W is pulsed low. The address is latched on the leading edge of the pulse, while

the data is latched on the trailing edge. Accidental programming or erasure is minimized because two

power supply considerations

Each device should have a 0.1-

power supplies should be appropriate to handle the current demand.

command definitions

See Table 3 for command definitions.

Table 3. Command Definitions

COMMAND

REQUIRED

BUS

FIRST BUS CYCLE

SECOND BUS CYCLE

COMMAND

BUS

CYCLES

OPERATION†

ADDRESS

DATA

OPERATION†

ADDRESS

DATA

Read

1

Write

X

0000h

Read

RA

RD

Algorithm-Selection Mode

3

Write

X

0090h

Read

0000

0001

0097h

00E5h

Set-Up-Erase/Erase

2

Write

X

0020h

Write

X

20h

Erase Verify

2

Write

EA

00A0h

Read

X

EVD

Set-Up-Program/Program

2

Write

X

0040h

Write

PA

PD

Program Verify

2

Write

X

00C0h

Read

X

PVD

Reset

2

Write

X

00FFh

Write

X

00FFh

† Modes of operation are defined in Table 1.

Legend:

EA

Address of memory location to be read during erase verify

RA

Address of memory location to be read

PA

Address of memory location to be programmed. Address is latched on the falling edge of W.

RD

Data read from location RA during the read operation

EVD

Data read from location EA during erase verify

PD

Data to be programmed at location PA. Data is latched on the rising edge of W.

PVD

Data read from location PA during program verify

X

Don’t care.

read command

register invokes the read operation. When the device is powered up, the default contents of the command

register are 0000h and the read operation is enabled. The read operation remains enabled until a different valid

command is written to the command register.