HMC704LP4E datasheet(35/44 Pages) AD

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HMC704LP4E

v04.0215

8 GHZ FRACTIONAL-N PLL

For price, delivery and to place orders: Analog Devices, Inc., One Technology Way, Norwood, MA 02062

978-250-3343 tel • 978-250-3373 fax • Order online at www.analog.com/hittitemw

Application support: Phone: 978-250-3343 or RFMG-apps@analog.com

Figure 39.Open Mode - Serial Port Timing Diagram - READ Operation 2-Cycles

sCLK

sDI

sEN

LD_sDO

sCLK

LD_sDO

Chip Address = 000

READ Address

sDI

d23

d30

d10

d31

LD**

FIRST CYCLE

SECOND CYCLE

**Note: Read-back on LD_sDO can function without sEN, however sEN

rising edge is required to return the LD_sDO to the LD state

sEN

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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106

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Application Support: Phone: 1-800-ANALOG-D

HMC704LP4E Datasheet(PDF) 35 Page - Analog Devices