5 - 21

HMC704LP4E

v04.0215

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With this simplification the total integrated VCO phase noise,

2

ν

where

( )

2

0

f

Φ

B is the 3dB corner frequency of the closed loop PLL

The integrated phase noise at the phase detector,

The rms phase jitter of the VCO (

) in rads, is just the square root of the phase noise integral.

since the simple integral of (EQ 5) is just a product of constants, we can easily do the integral in the log domain. For

example if the phase noise inside the loop is -110 dBc/Hz at 10 kHz offset and the loop bandwidth is 100 kHz, and the

division ratio is 100, then the integrated phase noise at the phase detector, in dB, is given by;

, or equivalently

95

20

10

−

Φ=

= 18urads = 1 milli-degrees

rms.

While the phase noise reduces by a factor of 20logN after division to the reference, due to the increased period of the

PD reference signal, the jitter is constant.

The rms jitter from the phase noise is then given by

2

jpn

pd

pd

TT

π

=

Φ

PD Window Based Lock Detect

The window based Lock Detect circuit effectively measures the difference between the arrival of the reference and the

divided VCO signals at the PD. The arrival time difference must consistently be less than the Lock Detect window

length, to declare lock. Either signal may arrive first, only the difference in arrival times is counted.

φ

o

()

B

φ

r2 Hz

⁄





ф(t)

фrms

Figure 30. Synthesizer Phase Noise and Jitter

(EQ 5)

( )

22

0

fB

ν

π

Φ= Φ

2

pd

Φ

2

2

2

pd

N

ν

Φ

Φ=

v

Φ

( )

(

)

2

2

2

0

10log

= -110 + 5 +50 - 40 = -95 dBrads

f

N

Φ

=

Φ

βπ

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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106

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