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AD5671R/AD5675R

Data Sheet

Rev. B | Page 22 of 32

THEORY OF OPERATION

DIGITAL-TO-ANALOG CONVERTER (DAC)

The AD5671R/AD5675R are octal, 12-/16-bit, serial input, voltage

output DACs with an internal reference. The devices operate from

supply voltages of 2.7 V to 5.5 V. Data is written to the AD5671R/

AD5675R in a 24-bit word format via a 2-wire serial interface.

The AD5671R/AD5675R incorporate a power-on reset circuit

to ensure that the DAC output powers up to a known output

state. The devices also have a software power-down mode that

reduces the typical current consumption to 1 µA.

TRANSFER FUNCTION

The internal reference is on by default.

Gain is the gain of the output amplifier and is set to 1 by default.

This can be set to ×1 or ×2 using the gain select pin (GAIN). When

this pin is tied to GND, all eight DAC outputs have a span from

0 V to VREF. If this pin is tied to VLOGIC, all eight DACs output a

span of 0 V to 2 × VREF.

DAC ARCHITECTURE

The AD5671R/AD5675R implement segmented string DAC

architecture with an internal output buffer. Figure 56 shows the

internal block diagram.

Figure 56. Single DAC Channel Architecture Block Diagram

The resistor string structure is shown in Figure 57. The code

loaded to the DAC register determines the node on the string

where the voltage is tapped off and fed into the output amplifier.

The voltage is tapped off by closing one of the switches and

connecting the string to the amplifier. Because each resistance

in the string has same value, R, the string DAC is guaranteed

monotonic.

Figure 57. Resistor String Structure

Internal Reference

The AD5671R/AD5675R on-chip reference is enabled at power-up,

but can be disabled via a write to the control register. See the

Internal Reference and Amplifier Gain Selection section for

details.

The AD5671R/AD5675R have a 2.5 V, 2 ppm/°C reference, giving

a full-scale output of 2.5 V or 5 V, depending on the state of the

GAIN pin. The internal reference associated with the device is

available at the VREFOUT pin. This buffered reference is capable of

driving external loads of up to 15 mA.

Output Amplifiers

The output buffer amplifier generates rail-to-rail voltages on its

output, which gives an output range of 0 V to VDD. The actual

range depends on the value of VREF, the GAIN pin, the offset

error, and the gain error. The GAIN pin selects the gain of the

output. If the GAIN pin is tied to GND, all eight outputs have a

gain of 1, and the output range is 0 V to VREF. If the GAIN pin is

tied to VLOGIC, all eight outputs have a gain of 2, and the output

range is 0 V to 2 × VREF.

These amplifiers are capable of driving a load of 1 kΩ in parallel

with 10 nF to GND. The slew rate is 0.8 V/µs with a typical ¼ to

¾ scale settling time of 5 µs.

INPUT

2.5V

REF

DAC

RESISTOR

STRING

REF (+)

REF (–)

VREF

VOUTX

GND

GAIN

(GAIN = 1 OR 2)

TO OUTPUT

AMPLIFIER

VREF

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