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AD5671R Datasheet(PDF) 28 Page - Analog Devices

Part # AD5671R
Description  Base station power amplifiers
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5671R Datasheet(HTML) 28 Page - Analog Devices

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AD5671R/AD5675R
Data Sheet
Rev. B | Page 28 of 32
HARDWARE RESET (RESET)
The RESET pin is an active low reset that allows the outputs to
be cleared to either zero scale or midscale. The clear code value
is user selectable via the RSTSEL pin. Keep RESET low for a
minimum time (see Table 5) to complete the operation. When
the RESET signal is returned high, the output remains at the
cleared value until a new value is programmed. While
the RESET pin is low, the outputs cannot be updated with a new
value. A software executable reset function is also available that
resets the DAC to the power-on reset code. Command 0110 is
designated for this software reset function. Any events
on LDAC or RESET during power-on reset are ignored.
RESET SELECT PIN (RSTSEL)
The AD5671R/AD5675R contain a power-on reset circuit that
controls the output voltage during power-up. By connecting the
RSTSEL pin low, the output powers up to zero scale. Note that
this power-up is outside the linear region of the DAC; by
connecting the RSTSEL pin high, VOUT powers up to midscale.
The output remains powered up at this level until a valid write
sequence is made to the DAC.
INTERNAL REFERENCE AND AMPLIFIER GAIN
SELECTION
The on-chip reference is on at power-up by default. To reduce
the supply current, turn off this reference by setting the software
programmable bit, DB0, in the internal reference and gain setup
register.
The state of Bit DB2 in the internal reference and gain setup
register determines the output amplifier gain setting for the
LFCSP package (see Table 16 and Table 17). Ignore Bit DB2 for
the TSSOP package. Command 0111 is reserved for setting up the
internal reference and amplifier gain.
Table 16. Internal Reference and Gain Setup Register
Bit
Description
DB2
Amplifier gain setting
DB2 = 0; amplifier gain = 1 (default)
DB2 = 1; amplifier gain = 2
DB1
Reserved; set to 0
DB0
Internal reference
DB0 = 0; reference is on (default)
DB1 = 1; reference is off
SOLDER HEAT REFLOW
As with all IC reference voltage circuits, the reference value
experiences a shift induced by the soldering process. Analog
Devices, Inc., performs a reliability test called precondition to
mimic the effect of soldering a device to a board. The output
voltage specification quoted previously includes the effect of
this reliability test.
Figure 64 shows the effect of solder heat reflow (SHR) as
measured through the reliability test (precondition).
Figure 64. Solder Heat Reflow Reference Voltage Shift
LONG-TERM TEMPERATURE DRIFT
Figure 65 shows the change in VREF value after 1000 hours in the
life test at 150°C.
Figure 65. Reference Drift Through to 1000 Hours
0
5
10
15
20
25
30
35
2.497
2.498
2.499
2.500
2.501
2.502
VREF (V)
POSTSOLDER
HEAT REFLOW
PRESOLDER
HEAT REFLOW
60
70
0
10
20
30
40
50
2.498
2.499
2.500
2.501
2.502
0 HOURS
168 HOURS
500 HOURS
1000 HOURS
VREF (V)



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