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AD7725 Datasheet(PDF) 22 Page - Analog Devices |
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AD7725 Datasheet(HTML) 22 Page - Analog Devices |
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22 / 28 page ![]() REV. A –22– AD7725 Status Register The status register is a 16-bit register that provides the user with information about the status of the device. The information avail- able to the user includes whether a configuration file was loaded successfully, what errors if any, occurred the last instruction written, and other information that may be useful to the user when operating the device. To read the status register, RS is taken high and RD/ WR is taken high. When CS is taken low, the contents of the status register will be output. The status register is shown in Table II and the instruction set in Table III. Table II. Status Register Bit Name Function 15 InstrBUSY This bit is set to 1 when an instruction is performed. 14 Data Ready This bit is set to 1 when data is ready to be read from the device (a read data cycle is required). 13 Data Request This bit is set to 1 when the device. requires data to be written to it (a write data cycle is required). 12 ID Error This bit is set to 1 if the programming data has an incorrect ID value. 11 CRC Error This bit is set to 1 if corrupt data is loaded into the device. 10 Data Error This bit is set to 1 if an overflow occurs to indicate that the conversion result is invalid. 9 InstrReg[15] Instruction Register Bit 15 8 InstrReg[13] Instruction Register Bit 13 7 InstrReg[12] Instruction Register Bit 12 6 InstrReg[11] Instruction Register Bit 11 5 InstrReg[6] Instruction Register Bit 6 4 InstrReg[5] Instruction Register Bit 5 3 InstrReg[4] Instruction Register Bit 4 2 InstrReg[1] Instruction Register Bit 1 1 InstrReg[0] Instruction Register Bit 0 0 CFGEND Configuration End Flag. This is set to 1 when the device has been configured correctly and is ready to start converting. Table III. Instruction Set for Parallel Mode Instruction Hex Code Description RdID 0x8802 Read Device ID RdCONV 0x8D21 Read Converter Data. When this instruction is issued to the AD7725, the device continues to output conversion data until the ABORT instruction is issued. WrConfig 0x1800 Write Configuration Data WrConfigEM 0x1A00 Write Configuration Data, Mask Errors ABORT 0x0000 Abort. This instruction is a soft reset, that is, it breaks the conversion process and leaves the device in a clean state, still configured, ready for the next instruction. BFR 0x2000 Boot from Internal ROM Configuring the Device Following power-up, the AD7725 is configured by loading a user- defined filter from an external source via the parallel interface. Three instructions are provided for configuring the AD7725 (see Table III). • WrConfig (Write Configuration) When this instruction is issued, the device generates an interrupt every time a new word of the configuration data is required. The interrupt is cleared on the falling edge of CS during the data write cycle. This continues until the com- plete file is written. Immediately after the last word of the configuration data is written, a final interrupt is asserted to indicate “Instruction Done.” However, if an error occurred during the configuration process, for example, if the configuration data is corrupt or in the wrong format, an interrupt will be asserted. It is advised that when using this instruction, the status regis- ter be read after each interrupt to ensure no errors occurred and that the correct response is made. If configuration data is corrupt, it will not be internally written to the postprocessor. • WrConfigEM (Write Configuration with Error Mask) When this instruction is issued, no interrupts to signal errors will ever be asserted during the download of the configura- tion file. This saves reading the status register in response to every interrupt as with the previous instruction. The configuration process will always run through the 504 (42 writes 12 blocks) data write cycles in the configura- tion file and once this is complete, the “Instruction Done” interrupt is issued. In this case, the status register should be checked at the end of the configuration to verify whether any errors occurred. If configuration data is corrupt, it will not be internally written to the postprocessor. For evaluation purposes, the user can load the default filter stored in internal ROM into the postprocessor. In this case the following instruction should be issued: • BFR (Boot from ROM) This instruction informs the device to load the configuration data for the default filter stored in internal ROM. |
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