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NSC800 Datasheet(PDF) 31 Page - National Semiconductor (TI) |
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NSC800 Datasheet(HTML) 31 Page - National Semiconductor (TI) |
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31 / 76 page  120 Instruction Set (Continued) 122 INSTRUCTION SET MNEMONIC NOTATION In the following instruction set listing the notations used are shown below b Designates one bit in a register or memory location Bit address mode uses this indicator cc Designates condition codes used in conditional Jumps Calls and Return instruction may be NZ e Non-Zero (Z flage0) Z e Zero (Z flage1) NC e Non-Carry (C flage0) C e Carry (C flage1) PO e Parity Odd or No Overflow (PVe0) PE e Parity Even or Overflow (PVe1) P e Positive (Se0) M e Negative (Se1) d Designates an 8-bit signed complement displace- ment Relative or indexed address modes use this indicator kk Subset of cc condition codes used in conjunction with conditional relative jumps may be NZ Z NC or C m1 Designates (HL) (IXad) or (IYad) Register indirect or indexed address modes use this indicator m2 Designates (BC) (DE) or (nn) Register indirect or di- rect address modes use this indicator n Any 8-bit binary number nn Any 16-bit binary number p Designates restart vectors and may be the hex values 0 8 10 18 20 28 30 or 38 Restart instructions employing the modified page zero addressing mode use this indicator pp Designates the BC DE SP or any 16-bit register used as a destination operand in 16-bit arithmetic opera- tions employing the register address mode qq Designates BC DE HL A F IX or IY during opera- tions employing register address mode r Designates A B C D E H or L Register addressing modes use this indicator rr Designates BC DE HL SP IX or IY Register ad- dressing modes use this indicator ss Designates HL IX or IY Register addressing modes use this indicator XL Subscript L indicates the lower-order byte of a 16-bit register XH Subscript H indicates the high-order byte of a 16-bit register ( ) parentheses indicate the contents are considered a pointer address to a memory or IO location 123 ASSEMBLED OBJECT CODE NOTATION Register Codes r Register rp Register rs Register 000 B 00BC00BC 001 C 01DE01DE 010 D 10HL10HL 011 E 11SP11AF 100 H pp Register qq Register 101 L 00BC00BC 111 A 01DE01DE 10 IX 10 HL 11 SP 11 AF Conditions Codes cc Mnemonic True Flag Condition 000 NZ Ze0 001 Z Ze1 010 NC Ce0 011 C Ce1 100 PO PVe0 101 PE PVe1 110 P Se0 111 M Se1 kk Mnemonic True Flag Condition 00 NZ Ze0 01 Z Ze1 10 NC Ce0 11 C Ce1 Restart Addresses tT 000 X’00 001 X’08 010 X’10 011 X’18 100 X’20 101 X’28 110 X’30 111 X’38 31 |
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