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NSC800 Datasheet(PDF) 36 Page - National Semiconductor (TI) |
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NSC800 Datasheet(HTML) 36 Page - National Semiconductor (TI) |
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36 / 76 page  126 8-Bit Arithmetic REGISTER ADDRESSING ARITHMETIC Hex Hex C Value H Value Number C Op Before In Before In Added After DAA Upper DAA Lower To DAA Digit Digit Byte (Bits 7-4) (Bits 3-0) 0 0-9 0 0-9 00 0 0 0-8 0 A-F 06 0 0 0-9 1 0-3 06 0 ADD 0 A-F 0 0-9 60 1 ADC 0 9-F 0 A-F 66 1 INC 0 A-F 1 0-3 66 1 1 0-2 0 0-9 60 1 1 0-2 0 A-F 66 1 1 0-3 1 0-3 66 1 SUB 0 0-9 0 0-9 00 0 SBC 0 0-8 1 6-F FA 0 DEC 1 7-F 0 0-9 A0 1 NEG 1 6-F 1 6-F 9A 1 ADD A r Add contents of register r to the Accumulator A w Aar S Set if negative result Z Set if zero result H Set if carry from bit 3 PV Set according to overflow condition N Reset C Set if carry from bit 7 76543210 10000 r Timing M cycles1 T states4 Addressing Mode SourceRegister DestinationImplied ADC A r Add contents of register r plus the carry flag to the Accu- mulator A w A a r a CY S Set if negative result Z Set if zero result H Set if carry from bit 3 PV Set if result exceeds 2’s com- plement range N Reset C Set if carry from bit 7 76543210 10001 r Timing M cycles1 T states4 Addressing Mode SourceRegister DestinationImplied SUB r Subtract the contents of register r from the Accumulator A w A b r S Set if result is negative Z Set if result is zero H Set if borrow from bit 4 PV Set if result exceeds 8-bit 2’s complement range N Set C Set according to borrow 76543210 10010 r Timing M cycles1 T states4 Addressing Mode SourceRegister DestinationImplied SBC A r Subtract contents of register r and the carry bit C from the Accumulator A w A b r b CY S Set if result is negative Z Set if result is zero H Set if borrow from bit 4 PV Set if result exceeds 8-bit 2’s complement range N Set C Set according to borrow 76543210 10011 r Timing M cycles1 T states4 Addressing Mode SourceRegister DestinationImplied AND r Logically AND the contents of the r register and the Accu- mulator A w A r S Set if result is negative Z Set if result is zero H Set PV Set if result parity is even N Reset C Reset 36 |
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