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SC2200 Datasheet(PDF) 218 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # SC2200
Description  Thin Client On a Chip
PDF  433 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

SC2200 Datasheet(HTML) 218 Page - National Semiconductor (TI)

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218
Revision 3.0
Core Logic Module (Continued)
0
ACPI Timer SMI Status. Indicates whether or not an SMI was caused by an ACPI Timer (F1BAR0+I/O Offset 1Ch or
F1BAR1+I/O Offset 1Ch) MSB toggle.
0: No.
1: Yes.
To enable SMI generation, set F0 Index 83h[5] to 1.
Index 88h
General Purpose Timer 1 Count Register (R/W)
Reset Value: 00h
7:0
GPT1_COUNT. This field represents the load value for General Purpose Timer 1. This value can represent either an 8-bit
counter or a 16-bit counter (selected in F0 Index 8Bh[4]). It is loaded into the counter when the timer is enabled (F0 Index
83h[0] = 1). Once enabled, an enabled event (configured in F0 Index 89h[6:0]) reloads the timer.
The counter is decremented with each clock of the configured timebase (1 msec or 1 sec selected at F0 Index 89h[7]). Upon
expiration of the counter, an SMI is generated, and the top level SMI status is reported at F1BAR0+I/O Offset 00h/02h[9].
The second level SMI status is reported at F1BAR0+I/O Offset 04h/06h[0]. Once expired, this counter must be re-initialized
by either disabling and enabling it, or writing a new count value in this register.
Index 89h
General Purpose Timer 1 Control Register (R/W)
Reset Value: 00h
7
General Purpose Timer 1 TImebase. Selects timebase for General Purpose Timer 1 (F0 Index 88h).
0: 1 second.
1: 1 millisecond.
6
Re-trigger General Purpose Timer 1 on User Defined Device 3 (UDEF3) Activity.
0: Disable.
1: Enable.
Any access to the configured (memory or I/O) address range for UDEF3 (configured in F0 Index C8h and CEh) reloads
General Purpose Timer 1.
5
Re-trigger General Purpose Timer 1 on User Defined Device 2 (UDEF2) Activity.
0: Disable.
1: Enable.
Any access to the configured (memory or I/O) address range for UDEF2 (configured in F0 Index C4h and CDh) reloads
General Purpose Timer 1.
4
Re-trigger General Purpose Timer 1 on User Defined Device 1 (UDEF1) Activity.
0: Disable.
1: Enable.
Any access to the configured (memory or I/O) address range for UDEF1 (configured in F0 Index C0h and CCh) reloads
General Purpose Timer 1.
3
Re-trigger General Purpose Timer 1 on Keyboard or Mouse Activity.
0: Disable.
1: Enable.
Any access to the keyboard or mouse I/O address range listed below reloads General Purpose Timer 1:
— Keyboard Controller: I/O Ports 060h/064h.
— COM1: I/O Port 3F8h-3FFh (if F0 Index 93h[1:0] = 10 this range is included).
— COM2: I/O Port 2F8h-2FFh (if F0 Index 93h[1:0] = 11 this range is included).
2
Re-trigger General Purpose Timer 1 on Parallel/Serial Port Activity.
0: Disable.
1: Enable.
Any access to the parallel or serial port I/O address range listed below reloads the General Purpose Timer 1:
— LPT1: I/O Port 3BCh-3BEh.
— LPT2: I/O Port 378h-37Fh.
— COM1: I/O Port 3F8h-3FFh (if F0 Index 93h[1:0] = 10 this range is excluded).
— COM2: I/O Port 2F8h-2FFh (if F0 Index 93h[1:0] = 11 this range is excluded).
— COM3: I/O Port 3E8h-3EFh.
— COM4: I/O Port 2E8h-2EFh.
Table 5-29. F0: PCI Header and Bridge Configuration Registers for GPIO and LPC Support (Continued)
Bit
Description



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