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SC2200 Datasheet(PDF) 238 Page - National Semiconductor (TI) |
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SC2200 Datasheet(HTML) 238 Page - National Semiconductor (TI) |
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238 / 433 page  www.national.com 238 Revision 3.0 Core Logic Module (Continued) Offset 08h-0Bh SERIRQ_CNT — Serial IRQ Control Register (R/W) Reset Value: 00000000h 31:8 Reserved. 7 Serial IRQ Enable. 0: Disable. 1: Enable. 6 Serial IRQ Interface Mode. 0: Continuous. 1: Quiet. 5:2 Number of IRQ Data Frames. 0000: 17 frames 0100: 21 frames 1000: 25 frames 1100: 29 frames 0001: 18 frames 0101: 22 frames 1001: 26 frames 1101: 30 frames 0010: 19 frames 0110: 23 frames 1010: 27 frames 1110: 31 frames 0011: 20 frames 0111: 24 frames 1011: 28 frames 1111: 32 frames 1:0 Start Frame Pulse Width. 00: 4 Clocks 01: 6 Clocks 10: 8 Clocks 11: Reserved Offset 0Ch-0Fh DRQ_SRC — DRQ Source Register (R/W) Reset Value: 00000000h DRQx are internal signals between the Core Logic and SuperI/O modules. 31:8 Reserved. 7 DRQ7 Source. Selects the interface source of the DRQ7 signal. 0: ISA - DRQ7 (Unavailable externally.) 1: LPC - LDRQ# (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable LDRQ# function on ball.) 6 DRQ6 Source. Selects the interface source of the DRQ6 signal. 0: ISA - DRQ6 (Unavailable externally.) 1: LPC - LDRQ# (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable LDRQ# function on ball.) 5 DRQ5 Source. Selects the interface source of the DRQ5 signal. 0: ISA - DRQ5 (Unavailable externally.) 1: LPC - LDRQ# (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable LDRQ# function on ball.) 4 LPC BM0 Cycles. Allow LPC Bus Master 0 Cycles. 0: Enable. 1: Disable. 3 DRQ3 Source. Selects the interface source of the DRQ3 signal. 0: ISA - DRQ3 (Unavailable externally.) 1: LPC - LDRQ# (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable LDRQ# function on ball.) 2 DRQ2 Source. Selects the interface source of the DRQ2 signal. 0: ISA - DRQ2 (Unavailable externally.) 1: LPC - LDRQ# (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable LDRQ# function on ball.) 1 DRQ1 Source. Selects the interface source of the DRQ1 signal. 0: ISA - DRQ1 (Unavailable externally.) 1: LPC - LDRQ# (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable LDRQ# function on ball.) 0 DRQ0 Source. Selects the interface source of the DRQ0 signal. 0: ISA - DRQ0 (Unavailable externally.) 1: LPC - LDRQ# (Program PMR[14] = 1 and PMR[22] = 1 or LPC_ROM strap = 1 to enable LDRQ# function on ball.) Table 5-31. F0BAR1+I/O Offset: LPC Interface Configuration Registers (Continued) Bit Description |
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