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ST7LITEUS5 Datasheet(PDF) 82 Page - STMicroelectronics

Part # ST7LITEUS5
Description  Interrupt management
PDF  136 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7LITEUS5 Datasheet(HTML) 82 Page - STMicroelectronics

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On-chip peripherals
ST7LITEUS2, ST7LITEUS5
82/136
10.3.5
Interrupts
None.
10.3.6
Register description
Control/Status register (ADCCSR)
Reset value: 0000 0000 (00h)
Note:
A write to the ADCCSR register (with ADON set) aborts the current conversion, resets the
EOC bit and starts a new conversion.
7
0
EOC
SPEED
ADON
0
0
CH2
CH1
CH0
Read/Write (Except bit 7 read only)
Bit 7 EOC End of Conversion
This bit is set by hardware. It is cleared by software reading the ADCDRH register.
0: Conversion is not complete
1: Conversion complete
Bit 6 SPEED ADC clock selection
This bit is set and cleared by software. It is used together with the SLOW bit to
configure the ADC clock speed. Refer to the table in the SLOW bit description.
Bit 5 ADON A/D Converter on
This bit is set and cleared by software.
0: A/D converter is switched off
1: A/D converter is switched on
Bits 4:3 Reserved. Must be kept cleared.
Bits 2:0 CH[2:0] Channel Selection
These bits are set and cleared by software. They select the analog input to convert.
Table 32.
Channel selection
Channel pin
CH2
CH1
CH0
AIN0
0
0
0
AIN1
0
0
1
AIN2
0
1
0
AIN3
0
1
1
AIN4
1
0
0
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