ST7LITEUS5 datasheet(42/136 Pages) STMICROELECTRONICS

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Interrupts

ST7LITEUS2, ST7LITEUS5

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Note:

These 8 bits can be written only when the I bit in the CC register is set.

Changing the sensitivity of a particular external interrupt clears this pending interrupt. This

can be used to clear unwanted pending interrupts. Refer to Section : External interrupt

function.

7.3.2

External Interrupt Control register 2 (EICR2)

Reset value: 0000 0000 (00h)

Note:

These 8 bits can be written only when the I bit in the CC register is set.

Changing the sensitivity of a particular external interrupt clears this pending interrupt. This

can be used to clear unwanted pending interrupts. Refer to Section : External interrupt

function.

IS4[1:0] = 01 is the only safe configuration to avoid spurious interrupt in Halt and AWUFH

modes.

IS41

IS40

IS31

IS30

Read/Write

Bits 7:4 Reserved

Bits 3:2 IS4[1:0] ei4 sensitivity

These bits define the interrupt sensitivity for ei1 according to Table 10.

Bits 1:0 IS3[1:0] ei3 sensitivity

These bits define the interrupt sensitivity for ei0 according to Table 10.

Table 10.

Interrupt sensitivity bits

ISx1

ISx0

External interrupt sensitivity

Falling edge & low level

Rising edge only

Falling edge only

Rising and falling edge

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