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M0519LE3AE Datasheet(PDF) 47 Page - List of Unclassifed Manufacturers |
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M0519LE3AE Datasheet(HTML) 47 Page - List of Unclassifed Manufacturers |
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47 / 69 page ![]() M0519 Nov. 02, 2016 Page 47 of 69 Rev 1.02 I 2C Serial Interface Controller (I²C) 6.13 6.13.1 Overview I 2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. The I 2C standard is a true multi-master bus including collision detection and arbitration that prevents data corruption if two or more masters attempt to control the bus simultaneously. I 2C controller supports Power-down wake-up function. 6.13.2 Features The I 2C bus uses two wires (SDA and SCL) to transfer information between devices connected to the bus. The main features of the bus are: Master/Slave mode Bidirectional data transfer between masters and slaves Multi-master bus (no central master) Arbitration between simultaneously transmitting masters without corruption of serial data on the bus Serial clock synchronization allows devices with different bit rates to communicate via one serial bus Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer A built-in a 14-bit time out counter requested the I 2C interrupt if the I2C bus hangs up and timer-out counter overflows. External pull-up resistors are needed for high output Programmable clocks allow versatile rate control Supports 7-bit addressing mode Supports multiple address recognition ( four slave address with mask option) |
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