CS4970x4 Data Sheet

32-bit High Definition Audio Decoder DSP Family

DS752F1

15

Parameter

Symbol

Min

Typical

Max

Units

maximum speed of the communication port may be limited by the firmware application. Flow control using the SCP_

should be implemented to prevent overflow of the input data buffer.

——

400

kHz

SCP_CLK low time

1.25

—

—

µs

SCP_CLK high time

1.25

—

—

µs

SCP_SCK rising to SCP_SDA rising or falling for START or

STOP condition

1.25

—

—

µs

START condition to SCP_CLK falling

1.25

—

—

µs

SCP_CLK falling to STOP condition

2.5

—

—

µs

Bus free time between STOP and START conditions

3—

—

µs

Setup time SCP_SDA input valid to SCP_CLK rising

100

—

—

ns

2. This parameter is measured from the ViL level at the falling edge of the clock.

0—

—

ns

SCP_CLK low to SCP_SDA out valid

——

18

ns

SCP_CLK falling to SCP_IRQ rising

——

ns

NAK condition to SCP_IRQ low

—

ns

SCP_CLK rising to SCB_BSY low

—

ns

SCP_BSY#

SCP_CLK

SCP_SDA

SCP_IRQ#

0

1

6

780

1

7

A6

A0

R/W

ACK

LSB

8

ACK

MSB

6