CS4970x4 Data Sheet

32-bit High Definition Audio Decoder DSP Family

DS752F1

3

List of Figures

Figure 2. XTI Timing ..............................................................................................................................................11

Figure 3. Serial Control Port - SPI Slave Mode Timing ..........................................................................................13

Figure 4. Serial Control Port - SPI Master Mode Timing ........................................................................................14

Figure 7. Parallel Control Port - IntelÒ Slave Mode Read Cycle ...........................................................................17

Figure 8. Parallel Control Port - Intel Slave Mode Write Cycle ..............................................................................18

Figure 9. Parallel Control Port - MotorolaÒ Slave Mode Read Cycle Timing ........................................................20

Figure 10. Parallel Control Port - Motorola Slave Mode Write Cycle Timing .........................................................20

Figure 11. Digital Audio Input (DAI) Port Timing Diagram .....................................................................................21

Figure 12. DAI Slave Timing Diagram ...................................................................................................................21

Figure 13. Digital Audio Port Output Timing Master Mode .....................................................................................22

Figure 14. Digital Audio Output Timing, Slave Mode (Relationship LRCLK to SCLK) ...........................................23

Figure 15. External Memory Interface - SDRAM Burst Read Cycle .......................................................................24

Figure 16. External Memory Interface - SDRAM Burst Write Cycle .......................................................................24

Figure 17. External Memory Interface - SDRAM Auto Refresh Cycle ....................................................................25

Figure 18. External Memory Interface - SDRAM Load Mode Register Cycle ........................................................26

Figure 19. 128-Pin LQFP Pin-Out Diagram ...........................................................................................................28

Figure 20. 128-Pin LQFP Package Drawing ..........................................................................................................29

List of Tables

Table 1. CS4970x4 Related Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 2. Device and Firmware Selection Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. CS4970x4 DSP Memory Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 5. Environmental, Manufacturing, & Handling Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table 6. 128-Pin LQFP Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29