PC87372 datasheet(3/144 Pages) NSC

3 / 144 page

Features (Continued)

www.national.com

Revision 1.2

— Generates “highest active supply” reference voltage

❏

Based on 3.3V and 5V Main supplies

❏

Based on 3.3V and 5V Standby supplies

— High-current LED driver control for Hard Disk Drive

activity indication

— CNR downstream codec, dynamic control

Fan Speed Monitor (FSM)

— Supports tachometers with one or two pulses per

revolution

— Speed monitoring for two fans, including:

❏

Digital ﬁltering of the tachometer input signal

❏

16-bit fan speed data

❏

Alarm for fan speed slower than programed

threshold

❏

Alarm for fan stopped

Power Management

Supports ACPI Specification Revision 2.0b, July 27,

2000

System Wake-Up Control (SWC)

— Optional

routing

events

generate

SCI

(SIOPME) on detection of:

❏

Keyboard or Mouse events

❏

Ring Indication RI on the serial port

❏

General-Purpose Input Events from the 12 GPIO

pins

❏

IRQs of the Keyboard and Mouse Controller

❏

IRQs of the other internal modules

— Optional routing of the SCI (SIOPME) to generate

IRQ (SERIRQ)

— Implements the GPE1_BLK of the ACPI General Pur-

pose (Generic) Register blocks with “child” events

— VSB3-powered event detection and event-logic con-

ﬁguration

Enhanced Power Management (PM), including:

— Special conﬁguration registers for power down

— Low-leakage pins

— Low-power CMOS technology

— Ability to disable all modules

— High-current LED drivers control (two LEDs) for

power status indication with:

❏

Standard blinking, controlled by software

❏

Advanced blinking, controlled by power supply sta-

tus, sleep state or software

Keyboard Events

— Wake-up on any key

— Supports programmable 8-byte sequence “Pass-

word” or “Special Keys” for Power Management

— Simultaneous recognition of three programmable

keys (sequences): “Power”, “Sleep” and “Resume”

— Wake-up on mouse movement and/or button click

Clocking, Supply, and Package Information

Clocks

— LPC (PCI) clock input (up to 33 MHz)

— Low-frequency 32.768 KHz clock input, active also

in S3-S5 (when VDD3 is off), for:

❏

System Wake-Up Control (SWC) wake-up timing

❏

LED blink timing

❏

Glue Functions timing

— On-chip Clock Generator:

❏

Generates 48 MHz for the SuperI/O modules

and FSM

❏

Based on the 14.31818 MHz clock input

❏

VDD3 powered

Protection

— All device pins are 5V tolerant and back-drive pro-

tected (except LPC bus pins

— High ESD protection of all the device pins

— Pin multiplexing selection lock

— Conﬁguration register lock

Testability

— XOR tree structure

❏

Includes all the device pins (except the supply

and the analog pins)

❏

Selected at power-up by strap input (TEST)

— TRI-STATE device pins, selected at power-up by

strap input (TRIS)

Power Supply

— 3.3V supply operation

— Separate pin pairs for main (VDD3) and standby

(VSB3) power supplies

— Low standby power consumption

Package

— 128-pin PQFP

PC87372 Datasheet(PDF) 3 Page - National Semiconductor (TI)

PC87372 Datasheet(HTML) 3 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL