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MAX8543EEE Datasheet(PDF) 22 Page - Maxim Integrated Products

Part # MAX8543EEE
Description  Step-Down Controllers with Prebias Startup, Lossless Sensing, Synchronization, and OVP
PDF  27 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX8543EEE Datasheet(HTML) 22 Page - Maxim Integrated Products

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Step-Down Controllers with Prebias Startup,
Lossless Sensing, Synchronization, and OVP
22
______________________________________________________________________________________
MOSFET Snubber Circuit
Fast switching transitions cause ringing because of res-
onating circuit parasitic inductance and capacitance at
the switching nodes. This high-frequency ringing
occurs at LX’s rising and falling transitions and can
interfere with circuit performance and generate EMI. To
dampen this ringing, a series RC snubber circuit is
added across each switch. Below is the procedure for
selecting the value of the series RC circuit.
Connect a scope probe to measure VLX to GND and
observe the ringing frequency, fR.
Find the capacitor value (connected from LX to GND)
that reduces the ringing frequency by half.
The circuit parasitic capacitance (CPAR) at LX is then
equal to 1/3rd the value of the added capacitance above.
The circuit parasitic inductance (LPAR) is calculated by:
The resistor for critical dampening (RSNUB) is equal to
2
π x fR x LPAR. Adjust the resistor value up or down
to tailor the desired damping and the peak voltage
excursion.
The capacitor (CSNUB) should be at least 2 to 4 times the
value of the CPAR to be effective. The power loss of the
snubber circuit (PRSNUB) is dissipated in the resistor and
can be calculated as:
where VIN is the input voltage and fSW is the switching
frequency. Choose an RSNUB power rating that meets
the specific application’s derating rule for the power
dissipation calculated.
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor must meet the ripple-current
requirement (IRMS) imposed by the switching currents
defined by the following equation:
IRMS has a maximum value when the input voltage equals
twice the output voltage (VIN = 2 x VOUT), so IRMS(MAX) =
ILOAD / 2. Ceramic capacitors are recommended due to
their low ESR and ESL at high frequency with relatively
low cost. Choose a capacitor that exhibits less than 10°C
temperature rise at the maximum operating RMS current
for optimum long-term reliability. Ceramic capacitors with
an X5R or better temperature characteristic are recom-
mended. When operating from a soft input source, an
additional input capacitor (bulk bypass capacitor) may
be required to prevent input from sagging.
Output Capacitor
The key selection parameters for the output capacitor
are the actual capacitance value, the equivalent series
resistance (ESR), the equivalent series inductance
(ESL), and the voltage-rating requirements. These
parameters affect the overall stability, output voltage
ripple, and transient response. The output ripple has
three components: variations in the charge stored in
the output capacitor, the voltage drop across the
capacitor’s ESR, and ESL caused by the current into
and out of the capacitor. The maximum output voltage
ripple is estimated as follows:
VRIPPLE = VRIPPLE(ESR) + VRIPPLE(C) + VRIPPLE(ESL)
The output voltage ripple as a consequence of the
ESR, ESL, and output capacitance is:
where IP-P is the peak-to-peak inductor current:
These equations are suitable for initial capacitor selec-
tion, but final values should be chosen based on a proto-
type or evaluation circuit. As a general rule, a smaller
current ripple results in less output voltage ripple. Since
the inductor ripple current is a factor of the inductor value
and input voltage, the output voltage ripple decreases
with larger inductance, and increases with higher input
voltages. Polymer, tantalum, or aluminum electrolytic
capacitors are recommended.
I
VV
fL
V
V
PP
IN
OUT
S
OUT
IN
− =
−
×
×
V
I
Cf
RIPPLE C
PP
OUT
S
() =
××
−
8
V
V
L
ESL
RIPPLE ESL
IN
() =×
V
I
ESR
RIPPLE ESR
P P
() =×
−
I
IV
V
V
V
RMS
LOAD
OUT
IN
OUT
IN
=
×−
()
PC
V
f
RSNUB
SNUB
IN
SW
=×
() ×
2
L
fC
PAR
R
PAR
=
() ×
1
2
2
π



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