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AX88615P Datasheet(PDF) 14 Page - ASIX Electronics Corporation |
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AX88615P Datasheet(HTML) 14 Page - ASIX Electronics Corporation |
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14 / 26 page ![]() ASIX ELECTRONICS CORPORATION 14 CONFIDENTIAL AX88615P 5-Port 10/100Mb Switch Controller PRELIMINARY threshold, the MAC of port will send out a PAUSE frame with maximum delay. The switch will send out a PAUSE frame with zero delay after below FlowControlActive threshold. For the receiving channel, the switch will not transmit the next packet whenever received a PAUSE frame with non-zero delay. The switch will resume packet transmission either after the pause timer expired or a PAUSE frames with zero delay received. In half-duplex mode, the switch will receive and transmit the packet in accordance to 802.3 CSMA/CD. If the occupancy of the buffer memory is above the FlowControlActive threshold, the MAC of port will send out JAM pattern . 3.5 LED Display Interface AX88615 provides LED status indication for memory test and packet buffer utilization (%). All LED[2:0] perform active low. LED[2:0] Status Driver Wave-form as follows : LED_CK LED[0] LED[0] Continue LED[1] D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D11 D12 D13 D14 D10 D15 LED[1] Continue SW UTI0 SW UTI1 SW UTI2 SW UTI3 SW UTI4 SW UTI5 D16 D19 D20 D21 D22 D18 D23 D17 ( This portation no clock presented ) Chip 0 Memory Test Fail and/or 100M Collision Chip 1 Memory Test Fail and/or 10M Collision N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A It must use external shift register to decode data on LED[1]. The application shows as follows: 74LS164(#1) Q 0 Q 1 Q 2 Q 3 Q 4 Q 5 Q 6 Q 7 D LED[1] LED_CK 74LS164(#2) Q 0 Q 1 Q 2 Q 3 Q 4 Q 5 Q 6 Q 7 D Fig - 3 Application for LED display |
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