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XRT73LC00 Datasheet(PDF) 49 Page - Exar Corporation

Part # XRT73LC00
Description  E3/DS3/STS-1 LINE INTERFACE UNIT
PDF  53 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT73LC00 Datasheet(HTML) 49 Page - Exar Corporation

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XRT73LC00
E3/DS3/STS-1 LINE INTERFACE UNIT
PRELIMINARY
REV. P1.0.1
46
5.1.3
Command Register - CR2
Bit D4 - Reserved
This bit-field has no defined functionality
Bit D3 - ENDECDIS (B3ZS/HDB3 Encoder/Decod-
er-Disable)
This Read/Write bit-field is used to enable or disable
the B3ZS/HDB3 Encoder/Decoder in the
XRT73LC00.
Writing a “1” to this bit-field disables the B3ZS/HDB3
Encoder. Writing a “0” to this bit-field enables the
B3ZS/HDB3 Encoder.
NOTE: This Encoder performs HDB3 Encoding if the
XRT73LC00 is operating in the E3 Mode. Otherwise, it per-
forms B3ZS Encoding.
Bit D2 - ALOSDIS (Analog LOS Disable)
This Read/Write bit-field is used to disable the Analog
LOS Detector.
Writing a “0” to this bit-field enables the Analog LOS
Detector. Writing a “1” to this bit-field disables the
Analog LOS Detector.
NOTE: If the Analog LOS Detector is disabled, then the
RLOS input pin is only asserted by the DLOS (Digital LOS
Detector).
Bit D1 - DLOSDIS (Digital LOS Disable)
This Read/Write bit-field is used to disable the Digital
LOS Detector.
Writing a “0” to this bit-field enables the Digital LOS
Detector. Writing a “1” to this bit-field disables the
Digital LOS Detector.
NOTE: If the Digital LOS Detector is disabled, then the
RLOS input pin is only asserted by the ALOS (Analog LOS
Detector).
Bit D0 - REQDIS (Receive Equalization Disable)
This Read/Write bit-field is used to either enable or
disable the internal Receive Equalizer in the
XRT73LC00.
Writing a “0” to this bit-field enables the Internal
Equalizer. Writing a “1” to this bit-field disables the
Internal Equalizer.
5.1.4
Command Register - CR3
Bit D4 - RNRZ (Receive Binary Data)
This Read/Write bit-field is used to configure the
XRT73LC00 to output the received data from the Re-
mote Terminal in a binary or Dual-Rail format.
Writing a “1” to this bit-field configures the
XRT73LC00 to output data to the Terminal Equipment
in a Single-Rail (binary) format via the RPOS output
pin. The RNEG is grounded. A “0” to this bit-field
configures the XRT73LC00 to output data to the Ter-
minal Equipment in a Dual-Rail format via both the
RPOS and RNEG output pins.
Bit D3 - LOSMUT (Recovered Data Muting during
LOS Condition)
This Read/Write bit-field is used to configure the
XRT73LC00 to NOT output any recovered data while
it is declaring an LOS condition to the terminal equip-
ment.
Writing a “0” to this bit-field configures the chip to out-
put recovered data even while the XRT73LC00 is de-
claring an LOS condition. Writing a “1” to this bit-field
configures the chip to NOT output the recovered data
while an LOS condition is being declared.
NOTE: In this mode, RPOS and RNEG is set to “0” asyn-
chronously.
Bit D2 - RCLK2/LCV (Receive Clock Output 2/Line
Code Violation)
This Read/Write bit-field is used to select the function
of pin 30 (RCLK2/LCV). Pin 30 can be configured to
function as the Line Code Violation output indicator or
as the additional Receive Clock Output (RCLK2).
Writing a “0” to this bit-field configures the pin to func-
tion as the Line Code Violation output pin. Writing a
“1” to this bit-field configures this pin to function as
the RCLK2 output pin.
Bit D1 - RCLK2INV (Invert RCLK2)
This Read/Write bit-field is used to configure the Re-
ceiver in the XRT73LC00 to output the recovered da-
ta on either the rising edge or the falling edge of the
RCLK2 clock signal.
Writing a “0” to this bit-field configures the Receiver to
output the recovered data on the rising edge of the
RCLK2 output signal. Writing a “1” to this bit-field
configures the Receiver to output the recovered data
on the falling edge of the RCLK2 output signal.
Bit D0 - RCLK1INV (Invert RCLK1)
This Read/Write bit-field is used to configure the Re-
ceiver in the XRT73LC00 to output the recovered da-
ta on either the rising edge or the falling edge of the
RCLK1 clock signal.
Writing a “0” to this bit-field configures the Receiver to
output the recovered data on the rising edge of the
RCLK1 output signal. Writing a “1” to this bit-field
configures the Receiver to output the recovered data
on the falling edge of the RCLK1 output signal.
5.1.5
Command Register - CR4
Bit D4 - Reserved
This bit-field has no defined functionality
Bit D3 - STS-1/DS3 Mode Select



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