DA6102 datasheet(73/82 Pages) DIALOG

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DA6102

6-Channel High Efficiency PMIC for 2-Cell Systems

Datasheet

Revision 2.1

28-Apr-2017

73 of 82

Bit

Mode

Symbol

Description

OTP-80

D[1:0]

R/W

SLP_VO1 [1:0]

CH1 slope compensation

00: 2.2 µH range

01: 1.0 µH range

10: 4.7 µH range

11: 3.3 µH range

Bit

Mode

Symbol

Description

OTP-80

D[6:5]

R/W

CMP_VO3 [1:0]

CH3 output filter compensation:

00: 3 kHz < LC pole < 8 kHz

01: 7 kHz < LC pole < 12 kHz

10: 11 kHz < LC pole < 18 kHz

11: 17 kHz < LC pole < 30 kHz

R/W

EXTFET

CH3 external FET current limit:

0: Typical 200 mV ILIM threshold

1: Typical 100 mV ILIM threshold

Note 1

LC pole frequency =

L 



Bit

Mode

Symbol

Description

OTP-80

R/W

LDSW1F

LDSW1 force ON

0: Current limit enabled

1: Force ON, current limit disabled

D[5:4]

R/W

LDO3V [1:0]

LDO2 output voltage:

00: 3.12 V

01: 3.17 V

10: 3.22 V

11: 3.27 V

(3.12 V)

R/W

PGCME

Power Good pin output type:

0: Open drain

1: CMOS

R/W

PSM4

CH4 Pulse skipping mode enable

0: Not enabled (fixed max duty operation)

1: Enabled (Extended max duty operation)

R/W

PSM3

CH3 Pulse skipping mode enable

0: Not enabled (fixed max duty operation)

1: Enabled (Extended max duty operation)

R/W

PSM2

CH2 Pulse skipping mode enable

0: Not enabled (fixed max duty operation)

1: Enabled (Extended max duty operation)

Note 1

With LDSW1F set high, LDSW1 is controlled only by the EN1 register, and can be enabled with the

EN pin low.

DA6102 Datasheet(PDF) 73 Page - Dialog Semiconductor

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