AD8452 datasheet(33/35 Pages) AD

33 / 35 page

AD8452

Data Sheet

Rev. 0 | Page 32 of 34

Table 10. Summary of Synchronization Options of the AD8452

DC Control Bias Applied to the SCFG

Pin (V)

SYNC Pin Input/Output State

and Delay Options

Master/Slave Sync

Input/

Output

Delay

0 to 0.50

Input

No delay

Slave

0.65 to 4.25

Input

0 μs to 7.5 μs delay (see Figure 27)

Slave

4.53 to 5

Output

No delay

Master

Figure 51 shows the internal voltage ramp of the AD8452. The

voltage ramp is a well controlled 4 V p-p.

4.5V

0.5V

4V p-p

0.03T

0.97T

Figure 51. Internal Voltage Ramp

Programming the Dead Time

To adjust the dead time on the synchronous DH and DL

outputs, connect a resistor (RDT) from DT to DGND and bypass

with a 47 pF capacitor. Select RDT for a given dead time using

Figure 28 or calculate RDT using the following equations. To

create a single equation for RDT, combine the equations for VDT

and RDT.

)

(ns)

(

)

(

−

DEAD

(10)

(11)

where:

VDT is the DT pin programming voltage.

IDT is the 20 µA (typical) internal current source.

tDEAD is the desired dead time in ns.

RDT is the resistor value in kΩ for the desired dead time.

To calculate RDT for a given tDEAD, the resulting equation used is

(ns)

)

(

−

Ω

DEAD

(12)

PROGRAMMING THE MAXIMUM DUTY CYCLE

The AD8452 is designed with a 97% (typical) maximum

internal duty cycle. By connecting a resistor from DMAX to

ground, the maximum duty cycle can be programmed at any

value from 0% to 97% by using the following equation:

( )

−

FREQ

DMAX

FREQ

MAX

(13)

where:

DMAX is the programmed maximum duty cycle.

VFREQ = 1.252 V (typical).

RDMAX is the value of the resistance used to program the

maximum duty cycle.

RFREQ is the frequency set resistor used in the application.

The DMAX current source is equivalent to the programmed

current of the FREQ pin:

FREQ

DMAX

(14)

where IDMAX = IFREQ, the current programmed on the

FREQ pin.

450

100

DUTY CYCLE (%)

100

200

150

250

300

350

400

TA = +25°C

MAXIMUM

DUTY CYCLE

97%

MAXIMUM

RESISTOR VALUE

(APPROX 400kΩ)

Figure 52. RDMAX vs. Duty Cycle, RFREQ = 100 kΩ, VINT = 5 V

The default maximum duty cycle of the AD8452 is 97%

(typical) even if the value of RDMAX indicates a larger percentage.

If a 97% internal maximum duty cycle is sufficient for the

application, the DMAX pin may be pulled to VREG or left

floating.

The CDMAX capacitor connected from the DMAX pin to the

ground plane must be 47 pF or greater.

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