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AD9271 Datasheet(PDF) 39 Page - Analog Devices

Part # AD9271
Description  Octal LNA/VGA/AAF/ADC and Crosspoint Switch
PDF  61 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9271 Datasheet(HTML) 39 Page - Analog Devices

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AD9271
Rev. B | Page 38 of
60
Table 15. Memory Map Register1
Addr.
(Hex)
Register Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
Notes/
Comments
Chip Configuration Registers
00
chip_port_config
0
LSB first
1 = on
0 = off
(default)
Soft
reset
1 = on
0 = off
(default)
1
1
Soft
reset
1 = on
0 = off
(default)
LSB first
1 = on
0 = off
(default)
0
0x18
The nibbles
should be
mirrored so
that LSB- or
MSB-first mode
is set correctly
regardless of
shift mode.
01
chip_id
Chip ID Bits [7:0]
(AD9271 = 0x13), (default)
Read
only
Default is
unique chip ID,
different for
each device.
This is a read-
only register.
02
chip_grade
X
X
Child ID [5:4]
(identify device
variants of Chip ID)
00 = 50 MSPS
(default)
01 = 40 MSPS
10 = 25 MSPS
X
X
X
X
0x00
Child ID used
to differentiate
graded devices.
Device Index and Transfer Registers
04
device_index_2
X
X
X
X
Data
Channel
H
1 = on
(default)
0 = off
Data
Channel
G
1 = on
(default)
0 = off
Data
Channel
F
1 = on
(default)
0 = off
Data
Channel
E
1 = on
(default)
0 = off
0x0F
Bits are set to
determine
which on-chip
device receives
the next write
command.
05
device_index_1
X
X
Clock
Channel
DCO±
1 = on
0 = off
(default)
Clock
Channel
FCO±
1 = on
0 = off
(default)
Data
Channel
D
1 = on
(default)
0 = off
Data
Channel
C
1 = on
(default)
0 = off
Data
Channel
B
1 = on
(default)
0 = off
Data
Channel
A
1 = on
(default)
0 = off
0x0F
Bits are set to
determine
which on-chip
device receives
the next write
command.
FF
device_update
X
X
X
X
X
X
X
SW
transfer
1 = on
0 = off
(default)
0x00
Synchronously
transfers data
from the
master shift
register to
the slave.
ADC Functions Registers
08
modes
X
X
X
X
LNA
bypass
1 = on
0 = off
(default)
Internal power-down mode
000 = chip run (default)
001 = full power-down
010 = standby
011 = reset
100 = CW mode (TGC PDWN)
0x00
Determines
various generic
modes of chip
operation.
09
clock
X
X
X
X
X
X
X
Dutycycle
stabilizer
1 = on
(default)
0 = off
0x01
Turns the
internal duty
cycle stabilizer
on and off.



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