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AD9671EBZ Datasheet(PDF) 9 Page - Analog Devices |
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AD9671EBZ Datasheet(HTML) 9 Page - Analog Devices |
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9 / 61 page  AD9675 Data Sheet Rev. A | Page 8 of 60 Parameter1 Temperature Min Typ Max Unit DIGITAL INPUT (SYSREF+, SYSREF−) Logic Compliance LVDS Internal Common-Mode Bias Full 0.9 V Differential Input Voltage Full 0.3 3.6 V p-p Input Voltage Range Full GND DRVDD V Input Common-Mode Range Full 0.9 1.4 V High Level Input Current Full −5 +5 μA Low Level Input Current Full −5 +5 μA Input Capacitance Full 4 pF Input Resistance Full 8 10 12 kΩ 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and information about how these tests were completed. 2 Specified for LVDS and LVPECL only. 3 Specified for 13 SDIO pins sharing the same connection. |
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