XRT75R03D datasheet(87/134 Pages) EXAR

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XRT75R03D

THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER

REV. 1.0.2

STS-1/

DS3_n

R/W

STS-1/DS3 Mode Select - Channel_n:

This READ/WRITE bit-field, along with Bit 2 (E3_n) is used

to configure a given channel (within the XRT75R03D) into

either the DS3, E3 or STS-1 Modes.

0 - Configures Channel_n to operate in the DS3 Mode

(provided by Bit 2 [E3_n], within this same register) has

been set to "0").

1 - Configures Channel_n to operate in the STS-1 Mode

(provided that Bit 2 [E3_n], within the same register) has

been set to "0".

NOTE: This bit-field is ignored if Bit 2 (E3_n) has been set

to "1". In this case, Channel_n will be configured

to operate in the E3 Mode.

SR/DR_n

R/W

Single-Rail/Dual-Rail Select - Channel_n:

This READ/WRITE bit-field is used to configure Channel_n

to operate in either the Single-Rail or Dual-Rail Mode.

If the user configures the Channel to operate in the Single-

Rail Mode, then all of the following will happen.

• The B3ZS/HDB3 Encoder and Decoder blocks (within

Channel_n) will be enabled.

• The Transmit Section of Channel_n will accept all of the

outbound data (from the System-side Equipment) via the

TPDATA_n (or TxDATA_n) input pin.

• The Receive Section of each channel will output all of

the recovered data (to the System-side Equipment) via

the RPOS_n output pin.

• The corresponding RNEG_n/LCV_n output pin will now

function as the LCV (Line Code Violation or Excessive

Zero Event) indicator output pin for Channel_n.

If the user configures Channel_n to operate in the Dual-

Rail Mode, then all of the following will happen.

• The B3ZS/HDB3 Encoder and Decoder blocks of

Channel_n will be disabled.

• The Transmit Section of Channel_n will be configured to

accept positive-polarity data via the TPDATA_n input pin

and negative-polarity data via the TNDATA_n input pin.

• The Receive Section of Channel_n will pulse the

RPOS_n output pin "High" (for one period of RCLK_n)

for each time a positive-polarity pulse is received via the

RTIP_n/RRING_n input pins.

Likewise, the Receive

Section of each channel will also pulse the RNEG_n

output pin "High" (for one period of RCLK_n) for each

time a negative-polarity pulse is received via the

RTIP_n/RRING_n input pins.

0 - Configures Channel_n to operate in the Dual-Rail

Mode.

1 - Configures Channel_n to operate in the Single-Rail

Mode.

BIT NUMBER

NAME

TYPE

DEFAULT

VALUE

DESCRIPTION

XRT75R03D Datasheet(PDF) 87 Page - Exar Corporation

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