LTM2886 datasheet(19/38 Pages) LINER

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LTM2886

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• CS to SCK (master sample SDO, 1st SDO valid)

t0 → t1 ≈50ns, CS to CS2 propagation delay

t1 → t1+ Isolated slave device propagation

(response time), asserts SDO2

t1 → t3 ≈50ns, SDO2 to SDO propagation delay

t3 → t5 Set-up time for master SDO to SCK

• SDI to SCK (master data write to slave)

t2 → t4 ≈50ns, SDI to SDI2 propagation delay

t5 → t6 ≈50ns, SCK to SCK2 propagation delay

t2 → t5 ≥50ns, SDI to SCK, separate packet

non-zero set-up time

t4 → t6 ≥50ns, SDI2 to SCK2, separate packet

non-zero set-up time

• SDO to SCK (master sample SDO, subsequent

SDO valid)

set-up data transition SDI and SCK

t8 → t10 ≈50ns, SDI to SDI2 and SCK to SCK2

propagation delay

APPLICATIONS INFORMATION

t10

SDO2 data transition in response to SCK2

t10 → t11 ≈50ns, SDO2 to SDO propagation delay

t11 → t12 Set-up time for master SDO to SCK

Maximum data rate for single direction communication,

master to slave, is 8MHz, limited by the systems encod-

ing/decoding scheme or propagation delay. Timing details

for both variations of clock phase are shown in Figures 8

and 9 and Table 3.

Additional requirements to insure maximum data rate are:

• CS is transmitted prior to (asynchronous) or within

the same (synchronous) data packet as SDI

• SDI and SCK set-up data transition occur within the

same data packet. Referencing Figure 6, SDI can pre-

cede SCK by up to 13ns (t7 → t8) or lag SCK by 3ns

(t8 → t9) and not violate this requirement. Similarly in

Figure 8, SDI can precede SCK by up to 13ns (t4 → t5)

or lag SCK by 3ns (t5 → t6).

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