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LTM4615 Datasheet(PDF) 13 Page - Linear Technology

Part # LTM4615
Description  20VIN, Dual 4A or Single 8A DC/DC 關Module Regulator
PDF  32 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM4615 Datasheet(HTML) 13 Page - Linear Technology

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LTM4642
13
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For more information www.linear.com/LTM4642
Mode Selections and Phase-Locked Loop
The LTM4642 can be enabled to operate in discontinuous
orforcedcontinuousmode.Toselecttheforcedcontinuous
operation, tie the MODE/PLLIN pin to INTVCC. To select
discontinuous operation, or tie the MODE/PLLIN pin to
ground. This will improve the light load efficiency.
Frequency Selection and External Clock
Synchronization
An internal oscillator (clock generator) provides phase
interleaved internal clock signals for individual channels
to lock on to. The switching frequency and phase of each
switching channel is independently controlled by adjust-
ing the top MOSFET turn-on time (on-time) through the
one-shot timer. This is achieved by sensing the phase
relationship between a top MOSFET turn-on signal and
its internal reference clock through a phase detector, and
the time interval of the one-shot timer is adjusted on a
cycle-by-cycle basis, so that the rising edge of the top
MOSFET turn-on is always trying to synchronize to the
internal reference clock signal for the respective channel.
Thefrequencyoftheinternaloscillatorcanbeprogrammed
from 600kHz to 1.4MHz by connecting a resistor, RFREQ,
from the FREQ pin to signal ground (SGND). The equation:
RFREQ
( )=
41550
FREQ kHz
(
)
– 2.2
For applications with stringent frequency or interference
requirements, an external clock source connected to the
MODE/PLLIN pin can be used to synchronize the internal
clock signals through a clock phase-locked loop (Clock
PLL). The LTM4642 operates in forced continuous mode
of operation when it is synchronized to the external clock.
The external clock frequency has to be within ±30% of the
internal oscillator frequency for successful synchroniza-
tion. The clock input levels should be no less than 2V for
“high” and no greater than 0.5V for “low”. The MODE/
PLLIN pin has an internal 600k pull-down resistor.
PHASMD Pin Programming
The PHASMD pin determines the relative phases between
the internal reference clock signals for the two channels
applicaTions inForMaTion
as well as the CLKOUT signal, as shown in Table 2. The
phases tabulated are relative to zero degree (0°) being
defined as the rising edge of the internal reference clock
signal of channel 1. The CLKOUT signal can be used to
synchronize additional power regulator modules. The
system can be configured for up to 12-phase operation
with a multichannel solution. Typical configurations are
shown in Table 3 to interleave the phases of the channels.
The applications will validate a 6 phase multiple regulator
solution with multiple outputs.
Each of the LTM4642 channels can be paralleled up to 8A
of output, but cannot be paralleled from one module to
the other modules. Twelve phases can be paralleled with
no more than two phases per module.
Table 2
PHASMD
SGND
FLOAT
INTVCC
Channel 1
Channel 2
180°
180°
240°
CLKOUT
60°
90°
120°
Table 3
NUMBER OF
PHASES
NUMBER OF
LTM4642*
PIN CONNECTIONS
[PIN NAME (CHIP NUMBER)]
2
1
PHASMD(1) = FLOAT or SGND
3
2 or
1 + ½(LTM4642)
PHASMD(1) = INTVCC
MODE/PLLIN(2) = CLKOUT(1)
4
2
PHASMD(1) = FLOAT
PHASEMD(2) = FLOAT or SGND
MODE/PLLIN(2) = CLKOUT(1)
6
3
PHASMD(1) = SGND
PHASMD(2) = SGND
MODE/PLLIN(2) = CLKOUT(1)
PHASMD(3) = FLOAT or SGND
MODE/PLLIN(3) = CLKOUT(2)
*No more than two channels of any one module may be paralleled.
Soft-Start and Tracking
The LTM4642 has the ability to either soft-start by itself
with a capacitor or track the output of another channel or
externalsupply.Whenoneparticularchannelisconfigured
to soft-start by itself, a capacitor should be connected to
its TRACK/SS pin. This channel is in the shutdown state
if its RUN pin voltage is below 1.2V. Its TRACK/SS pin is
actively pulled to ground in this shutdown state.



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