LT3759 datasheet(13/44 Pages) LINER

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LT8710

8710f

For more information www.linear.com/LT8710

Frequency Foldback

The frequency foldback circuitry reduces the switching

frequency when 175mV < FBX < 1.01V (typical). This

feature lowers the minimum duty cycle that the part can

achieve,thusallowingbettercontroloftheinductorcurrent

at start-up. When the FBX voltage is pulled outside of this

range,theswitchingfrequencyreturnstonormal.Ifthepart

is configured to be in forced continuous conduction mode

(MODE pin is driven below 1.175V), then the frequency

foldback circuitry is disabled as long as INTVEE is not in

UVLO and the SS pin is higher than the SS Hi threshold.

Note that the peak inductor current at start-up is a function

ofmanyvariablesincludingloadprofile,outputcapacitance,

target VOUT, VIN, switching frequency, etc.

OPERATION – REGULATION

UsetheBlockDiagramwhensteppingthroughthefollowing

description of the LT8710 operating in regulation. Also,

assume the converter’s load current is high enough such

that the part is operating in synchronous switching. The

LT8710 has three modes of regulation:

1. Output Voltage (via FBX pin)

2. Input Voltage (via EN/FBIN pin)

3. Output Current (via ISP, ISN, and IMON pins)

All three of these regulation loops control the peak com-

manded current through the external NFET, MN. This

operation is the same regardless of the regulation mode,

so that will be described first.

At the start of each oscillator cycle, the SR latch (SR1)

is set, which first turns off the external PFET, MP, and

then turns on the external NFET, MN. The NFET’s source

current flows through an external current sense resistor

(RSENSE1) generating a voltage proportional to the NFET

switch current. This voltage is then amplified by A5 and

added to a stabilizing ramp. The resulting sum is fed into

thepositiveterminalofthePWMcomparatorA7.Whenthe

voltage on the positive input of A7 exceeds the voltage on

the negative input (VC pin), the SR latch is reset, turning

off the NFET and then turning on the PFET. The voltage

on the VC pin is controlled by one of the regulation loops,

or a combination of regulation loops. For simplicity, each

mode of regulation will be described independently so

that only one of the modes of regulation is in command

of the LT8710.

Output Voltage Regulation

A single external resistor is used to set the target output

voltage. See the Pin Functions section for selecting the

feedback resistor for a desired output voltage. The VC

pin voltage (negative input of A7) is set by EA1 (or EA2),

which is simply an amplified difference between the FBX

pinvoltageandthereferencevoltage(1.213ViftheLT8710

is configured as a noninverting converter or 9.6mV if

configured as an inverting converter). In this manner, the

FBX error amplifier sets the correct peak current level to

maintain output voltage regulation.

Input Voltage Regulation

A single resistor or resistor divider from the EN/FBIN pin

to the converter’s input voltage sets the input voltage

regulation. It is recommended to use a resistor divider for

improved accuracy as described in the Setting the Input

Voltage Regulation or Undervoltage Lockout section.

The EN/FBIN pin voltage connects to the positive input of

amplifier EA4. The VC pin voltage is set by EA4, which is

simply an amplified difference between the EN/FBIN pin

voltage and a 1.607V reference voltage. In this manner,

the EN/FBIN error amplifier sets the correct peak current

level to maintain input voltage regulation.

Output Current Regulation

An external sense resistor connected between the ISP and

ISNpins(RSENSE2)setsthemaximumoutputcurrentofthe

converter when placed in the source of the PFET, MP. A

built-in 51.8mV offset is added to the voltage seen across

RSENSE2. That voltage is then amplified and outputs to

the IMON pin. An external capacitor must be placed from

IMON to ground to filter the amplified chopped voltage

that’s sensed across RSENSE2. The voltage at the IMON pin

is fed to the negative input of the IMON error amplifier,

EA3. The VC pin voltage is set by EA3, which is simply an

amplified difference between the IMON pin voltage and the

1.213V reference voltage. In this manner, the IMON error

amplifier sets the correct peak current level to maintain

output current regulation.

operaTion

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