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LTC2385-18

238518f

For more information www.linear.com/LTC2385-18

TIMING DIAGRAM

APPLICATIONS INFORMATION

Data Output Timing

tCLKH

tCLKDCO

CLK+

CLK–

DCO+

DCO–

DA+

DA–

tCLKDCO

tCLKD

tCLKL

238518 TD03

DB+

DB–

OVERVIEW

The LTC2385-18 is a low noise, high speed, 18-bit succes-

siveapproximationregister(SAR)ADC.Operatingfrom5V

and 2.5V supplies, the LTC2385-18 has a fully differential

±4.096V input range, making it ideal for applications that

require a wide dynamic range. The LTC2385-18 achieves

±1.5 LSB INL (maximum), no missing codes at 18-bits

and 96dB SNR (typical).

The LTC2385-18 includes a precision internal 2.048V

reference, with a guaranteed 0.25% initial accuracy and

a ±20ppm/°C (maximum) temperature coefficient, as well

as an internal reference buffer. The LTC2385-18 also has

a high speed serial LVDS interface that can output one

or two bits at a time. The fast 5Msps throughput with no

pipeline latency makes the LTC2385-18 ideally suited for

a wide variety of high speed applications. The LTC2385-18

dissipates only 78mW at 5Msps and has a power-down

mode to reduce the power consumption to 10μW during

inactive periods.

CONVERTER OPERATION

The LTC2385-18 operates in two phases. During the ac-

quisition phase, the sample capacitors are connected to

the analog input pins IN+ and IN– to sample the differential

analog input voltage. A rising edge on the CNV pin initiates

a conversion. During the conversion phase, the ADC is

sequencedthroughasuccessiveapproximationalgorithm,

comparing the sampled input with binary-weighted frac-

tions of the reference voltage (e.g. VREFBUF/2, VREFBUF/4

… VREFBUF/262144) using a differential comparator. At

the end of conversion, control logic prepares the 18-bit

digital output code for serial transfer.

TRANSFER FUNCTION

The LTC2385-18 digitizes the full-scale voltage of 2×

REFBUF into 218 levels, resulting in an LSB size of 31.25μV

with REFBUF = 4.096V. The output data is in two’s comple-

ment format. The ideal transfer function is shown in Figure

1. The ideal offset binary transfer function can be obtained

from the two’s complement transfer function by inverting

the most significant bit (MSB) of each output code.

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