LT6237 datasheet(5/22 Pages) LINER

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LTC2385-18

238518f

For more information www.linear.com/LTC2385-18

ADC TIMING CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All voltage values are with respect to ground.

Note 3: When these pin voltages are taken below ground or above VDD,

VDDL or OVDD, they will be clamped by internal diodes. This product can

handle input currents up to 100mA below ground or above VDD, VDDL or

OVDD without latchup.

Note 4: When this pin voltage is taken below ground, it will be clamped by

an internal diode. When this pin voltage is taken above VDDL, it is clamped

by a diode in series with a 2k resistor. This product can handle input

currents up to 100mA below ground without latchup.

Note 5: VDD = 5V, VDDL = 2.5V, OVDD = 2.5V, fSMPL = 5MHz,

REFIN = 2.048V, single-ended CNV, one-lane output mode unless

otherwise noted.

Note 6: Recommended operating conditions.

The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. (Note 5)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

fSMPL

Sampling Frequency

0.02

Msps

tCONV

CNV

↑ to Output Data Ready

101

tACQ

Acquisition Time

tCYC – 67

tCYC

Time Between Conversions

200

50,000

tCNVH

CNV High Time

(Note 13)

tCNVL

CNV Low Time

(Note 13)

tFIRSTCLK

CNV

↑ to First CLK↑ from the Same Conversion

(Note 13)

104

tLASTCLK

CNV

↑ to Last CLK↓ from the Previous

Conversion

(Note 13)

tCLKH

CLK High Time

1.25

tCLKL

CLK Low Time

1.25

tCLKDCO

CLK to DCO Delay

(Note 13)

0.7

1.3

2.3

tCLKD

CLK to DA/DB Delay

(Note 13)

0.7

1.3

2.3

tSKEW

DCO to DA/DB skew

tCLKD – tCLKDCO (Note 13)

–200

200

tAP

Sampling Delay Time

(Note 13)

tJITTER

Sampling Delay Jitter

(Note 13)

0.25

psRMS

Note 7: Integral nonlinearity is defined as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

The deviation is measured from the center of the quantization band.

Note 8: Zero-scale error is the offset voltage measured from –0.5LSB

when the output code flickers between 00 0000 0000 0000 0000 and

11 1111 1111 1111 1111. Full-scale error is the worst-case deviation of

the first and last code transitions from ideal and includes the effect of

offset error.

Note 9: When REFBUF is overdriven, the internal reference buffer must be

turned off by setting REFIN = 0V.

Note 10: All specifications in dB are referred to a full-scale ±VREFBUF

differential input.

Note 11: Temperature coefficient is calculated by dividing the maximum

change in output voltage by the specified temperature range.

Note 12: fSMPL = 5MHz, IREFBUF varies linearly with sample rate.

Note 13: Guaranteed by design, not subject to test.

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