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LTC2385-18

238518f

For more information www.linear.com/LTC2385-18

APPLICATIONS INFORMATION

ANALOG INPUTS

The LTC2385-18 has a fully differential ±4.096V input

range. The IN+ and IN– pins should be driven 180 degrees

out-of-phase with respect to each other, centered around

a common mode voltage (IN+ + IN–)/2 that is restricted

to (VREFBUF/2 ± 0.1V). The ADC samples and digitizes the

voltage difference between the two analog input pins (IN+

− IN–), and any unwanted signal that is common to both

inputs is reduced by the common mode rejection ratio

(CMRR) of the ADC. The analog inputs can be modeled

by the equivalent circuit shown in Figure 2. The diodes

and 10Ω resistors at the input provide ESD and overdrive

protection. In the acquisition phase, each input sees ap-

proximately 18pF (CSAMPLE) from the sampling capacitor

in series with 28Ω (RON) from the on-resistance of the

sampling switch. CPAR is a lumped capacitance on the

order of 2pF formed primarily of diode junctions.

The inputs draw a small current spike while charging the

CSAMPLEcapacitorsduringacquisition.Thiscurrentspikeis

consistentanddoesnotdependonthepreviouslysampled

input voltage. During conversion and power-down, the

analog inputs draw only a small leakage current.

Input Drive Circuits

A low impedance source can directly drive the high im-

pedance inputs of the LTC2385-18 without gain error. A

high impedance source should be buffered to minimize

settling time during acquisition and to optimize the dis-

tortion performance of the ADC. Minimizing settling time

is important even for DC signals because the ADC inputs

draw a current spike when entering acquisition.

For best performance, a buffer amplifier should be used

to drive the analog inputs of the LTC2385-18. The ampli-

fier provides low output impedance enabling fast settling

of the analog signal during the acquisition phase. It also

providesisolationbetweenthesignalsourceandthecurrent

spike drawn by the ADC inputs when entering acquisition.

TheLTC2385-18isoptimizedforpulsedinputsthatarefully

settled when sampled, or dynamic signals up to 7.5MHz.

Input signals that change faster than 300mV/ns when they

are sampled are not recommended. This is equivalent to

an 8VP-P sine wave at 12MHz.

Input Filtering

The noise and distortion of the buffer amplifier and other

supporting circuitry must be considered since they add

to the ADC noise and distortion. A buffer amplifier with

low noise density must be selected to minimize SNR

degradation. A filter network should be placed between

the buffer output and ADC input to both minimize the

noise contribution of the buffer and reduce disturbances

reflected into the buffer from ADC sampling transients. A

simple one-pole lowpass RC filter is sufficient for many

applications. It is important that the RC time constant of

this filter be small enough to allow the analog inputs to

settlewithintheADCacquisitiontime(tACQ),asinsufficient

settling can limit INL and THD performance.

High quality capacitors and resistors should be used in

the RC filters since these components can add distortion.

Figure 1. LTC2385-18 Transfer Function

Figure 2. Equivalent Circuit for the Differential Analog

Inputs of the LTC2385-18

INPUT VOLTAGE (V)

–1

LSB

238518 F01

011...111

011...110

000...001

000...000

100...000

100...001

111...110

LSB

BIPOLAR

ZERO

111...111

FSR/2 – 1LSB

–FSR/2

FSR = +FS – –FS

1LSB = FSR/262144

IN+

CPAR

2pF

CSAMPLE

18pF

VDD

238518 F02

IN–

BIAS

VOLTAGE

CPAR

2pF

CSAMPLE

18pF

VDD

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