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AMD8513 Datasheet(PDF) 29 Page - Infineon Technologies AG |
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AMD8513 Datasheet(HTML) 29 Page - Infineon Technologies AG |
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29 / 88 page  Data Sheet 29 Rev. 1.21, 2005-12-05 ADM8513 Data Sheet Registers Description The register is addressed wordwise. WUF2M_15 Wakeup Frame 2 Mask 15 6FH 56 WUF2O Wakeup Frame 2 Offset 70H 56 WUF2CRCL Wakeup Frame 2 CRC Low 71H 58 WUF2CRCH Wakeup Frame 2 CRC High 72H 58 Res23 Reserved 23 73H 33 Res24 Reserved 24 74H 33 Res25 Reserved 25 75H 33 Res26 Reserved 26 76H 34 Res27 Reserved 27 77H 34 WUC Wakeup Control 78H 59 Res28 Reserved 28 79H 34 WUS Wakeup Status 7AH 60 IPHYC Internal PHY Control 7BH 60 GPIO54C GPIO[5:4] Control 7CH 61 Res29 Reserved 29 7DH 34 GPIO10C GPIO[1:0] Control 7EH 62 GPIO32C GPIO[3:2] Control 7FH 63 Test TEST 80H 64 TM Test Mode 81H 64 Table 65 Register Access Types Mode Symbol Description HW Description SW read/write rw Register is used as input for the HW Register is readable and writable by SW read r Register is written by HW (register between input and output -> one cycle delay) Value written by software is ignored by hardware; that is, software may write any value to this field without affecting hardware behavior (= Target for development.) Read only ro Register is set by HW (register between input and output -> one cycle delay) SW can only read this register Read virtual rv Physically, there is no new register, the input of the signal is connected directly to the address multiplexer. SW can only read this register Latch high, self clearing lhsc Latch high signal at high level, clear on read SW can read the register Latch low, self clearing llsc Latch high signal at low-level, clear on read SW can read the register Latch high, mask clearing lhmk Latch high signal at high level, register cleared with written mask SW can read the register, with write mask the register can be cleared (1 clears) Latch low, mask clearing llmk Latch high signal at low-level, register cleared on read SW can read the register, with write mask the register can be cleared (1 clears) Table 64 Registers Overview (cont’d) Register Short Name Register Long Name Offset Address Page Number |
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