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AMD8513 Datasheet(PDF) 32 Page - Infineon Technologies AG |
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AMD8513 Datasheet(HTML) 32 Page - Infineon Technologies AG |
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32 / 88 page  ADM8513 Data Sheet Registers Description Data Sheet 32 Rev. 1.21, 2005-12-05 Ethernet Control 2 EC2 Offset Reset Value Ethernet Control 2 02H 00H Field Bits Type Description MEPL 7 rw Max Ethernet Packet Length 0B 1528B, 1528 bytes 1B 1638B, 1638 bytes, Default is 0 Res 6 ro Reserved LEEPRS 5 rw Load EEPROM Start When this bit is written with 1, HW will start to load EEPROM. EEPRW 4 rw EEPROM Write Enable/disable 0B WEDC, EEPROM writes enable/disable command 1B WC, EEPROM writes command LB 3 rw MAC Loop Back Mode Enable PROM 2 rw Promiscuous 0B RPP, Receives packets which pass the address filter 1B RAP, Receives any packet RXBP 1 rw Receive Bad Packets 0B FABP, Filters all bad packet 1B RBPP, Receives bad packets which pass the address filter EP3RC 0 rw EP3 Read Cleared 0B AEP3, Access EP3, no effect to those registers. 1B OEP3, Once EP3 is accessed, those registers (2B-2F, 7A) will be cleared. |
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