EL7571 datasheet(8/19 Pages) RENESAS

8 / 19 page

EL7571

FN7298 Rev 1.00

Page 8 of 19

October 25, 2004

supply (VIN) and disables both PWM outputs (HSD, LSD)

when the supply voltage drops below 3.5V. When the supply

voltage is increased above 4V the watchdog initiates a soft-

start ramp and enables PWM operation. The difference

between enable and disable thresholds introduces hysteresis

into the circuit operation, preventing start-up oscillation. In

addition, output voltage is also monitored by the watchdog. As

called out by the Intel Pentium® II VRM specification, the

watchdog power good output (PWRGD) is set low whenever

the output voltage differs from it’s selected value by more than

±13%. PWRGD is an open drain output. A third watchdog

function disables PWM output switching during over-voltage

fault conditions, displaying both external FET drives, whenever

the output voltage is greater than 13% of its selected value,

thereby anticipating reverse inductor current ramping and

conforming to the VRM over-voltage specification, which

requires the regulator output to be disabled during fault

conditions. Switching is enabled after the fault condition is

removed.

Output Drivers

Complementary control signals developed by the PWM control

loop are fed to dual NMOS power FET drivers via a level shift

circuit. Each driver is capable of delivering nominal peak

output currents of 2A at 12V. To prevent shoot-through in the

external FET’s, each driver is disabled until the gate voltage of

the complementary power FET has fallen to less than 1V.

Supply connections for both drivers are independent, allowing

the controller to be configured with a boot-strapped high side

drive. Employing this technique a single supply voltage may be

used for both power FET’s and controller. Alternatively, the

application may be simplified using dual supply rails with the

power FET’s connected to a secondary supply voltage below

the controller’s, typically 12V and 5V. For applications where

efficiency is less important than cost, applications can be

further simplified by replacing the low side power FET with a

Schottky diode, resulting in non-synchronous operation.

Applications Information

The EL7571 is designed to meet the Intel 5 bit VRM

specification. Refer to the VID decode table for the controller

output voltage range.

The EL7571 may be used in a number converter topologies.

The trade-off between efficiency, cost, circuit complexity, line

input noise, transient response and availability of input supply

voltages will determine which converter topology is suitable for

a given application. The following table lists some of the

differences between the various configurations:

Circuit schematics and Bills of Material (BOMs) for the various

topologies are provided at the end of this data sheet. If your

application requirements differ from the included samples, the

following design guide lines should be used to select the key

component values. Refer to the front page connection diagram

for component locations.

Output Inductor, L1

Two key converter requirements are used to determine

inductor value:

•IMIN- minimum output current; the current level at which the

converter enters the discontinuous mode of operation (refer

to Elantec application note #18 for a detailed discussion of

discontinuous mode)

•IMAX- maximum output current

Although many factors influence the choice of the inductor

value, including efficiency, transient response and ripple

current, one practical way of sizing the inductor is to select a

value which maintains continuous mode operation, i.e. inductor

current positive for all conditions. This is desirable to optimize

load regulation and light load transient response. When the

minimum inductor ripple current just reaches zero and with the

mean ripple current set to IMIN, peak inductor ripple current is

twice IMAX, independent of duty cycle. The minimum inductor

value is given by:

Converter Topologies

TOPOLOGY

DIAGRAM

EFFICIENCY

COST

COMPLEXITY INPUT NOISE

TRANSIENT

RESPONSE

5V only Non-synchronous

figure 1

92%

low

high

good

5V only Synchronous

figure 2

95%

higher

high

good

5V &12V Non-synchronous

figure 3

92%

lowest

high

good

5V & 12V Synchronous

figure 4

95%

high

good

12V only Synchronous

Connection Diagram

92%

highest

high

best

L1MIN

 IN VOUT TON



–

1PEAK

--------------------------------------------------------

 IN VOUT VOUT



–

VIN FSW 2IMIN



------------------------------------------------------------

EL7571 Datasheet(PDF) 8 Page - Renesas Technology Corp

EL7571 Datasheet(HTML) 8 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datasheet Download

Link URL