Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

IMX7SCEC Datasheet(PDF) 28 Page - NXP Semiconductors

Part # IMX7SCEC
Description  i.MX 7Solo Family
PDF  152 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

IMX7SCEC Datasheet(HTML) 28 Page - NXP Semiconductors

Back Button IMX7SCEC Datasheet HTML 24Page - NXP Semiconductors IMX7SCEC Datasheet HTML 25Page - NXP Semiconductors IMX7SCEC Datasheet HTML 26Page - NXP Semiconductors IMX7SCEC Datasheet HTML 27Page - NXP Semiconductors IMX7SCEC Datasheet HTML 28Page - NXP Semiconductors IMX7SCEC Datasheet HTML 29Page - NXP Semiconductors IMX7SCEC Datasheet HTML 30Page - NXP Semiconductors IMX7SCEC Datasheet HTML 31Page - NXP Semiconductors IMX7SCEC Datasheet HTML 32Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 152 page
background image
Electrical characteristics
i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017
NXP Semiconductors
28
The following table summarizes the external power supply state in all the power modes.
The NVCC_DRAM_CKE can be still ON during SNVS/LPSR mode to keep the CKE/RESET pad in
correct state to hold DRAM device in self-refresh mode.
The NVCC_XXX can be off in RUN mode / Low Power mode if all the pads in that IO bank is not used
in the application, the NVCC_XXX supply could be tied to GND.
The VDD_USB_OTG1_3P3_IN and VDD_USB_OTG2_3P3_IN are fully asynchronous to other power
rails, so it can be either ON/OFF in any of the power modes.
4.1.6.1
OFF Mode
In OFF mode, all the power rails are shut off.
4.1.6.2
SNVS Mode
SNVS mode is also called RTC mode, where only the power for the SNVS domain remain on. In this
mode, only the RTC and tamper detection logic is still active.
The power consumption in SNVS model with all the tamper detection logic enabled will be less than
5 uA @ 3.0 V on VDD_SNVS_IN for typical silicon at 25
°C.
The external DRAM device can keep in self-refresh when the chip stays in SNVS mode with
NVCC_DRAM_CKE still powered. During the state transition between SNVS mode to/from ON mode,
the DRAM_CKE pad and DRAM_RESET pad has to always stay in correct state to keep DRAM in
self-refresh mode. No glitch / floating is allowed.
Table 14. Power modes
Power rail
OFF
SVNS
LPSR
RUN
Low Power
VDD_ARM
OFF
OFF
OFF
ON
ON/ OFF
VDD_SOC
OFF
OFF
OFF
ON
ON
VDDA_1P8_IN
OFF
OFF
OFF
ON
ON
VDD_SNVS_IN
OFF
ON
ON
ON
ON
VDD_LPSR_IN
OFF
OFF
ON
ON
ON
NVCC_GPIO1/2
OFF
OFF
ON
ON
ON
NVCC_DRAM
OFF
OFF
OFF
ON
ON
NVCC_DRAM_CKE
OFF
OFF / ON
OFF / ON
ON
ON
NVCC_XXX
OFF
OFF
OFF
ON / OFF
ON / OFF
VDD_USB_OTG1_3P3_IN
VDD_USB_OTG2_3P3_IN
OFF / ON
OFF / ON
OFF / ON
ON / OFF
ON / OFF



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com