IMX7SCEC datasheet(77/152 Pages) NXP

77 / 152 page

Electrical characteristics

i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017

NXP Semiconductors

4.10.1.2

ECSPI Slave mode timing

Figure 45 depicts the timing of ECSPI in Slave mode. Table 53 lists the ECSPI Slave mode timing

characteristics.

Figure 45. ECSPI Slave mode timing diagram

Table 53. ECSPI Slave mode timing parameters

Parameter

Symbol

Min

Max

Unit

CS1 ECSPIx_SCLK Cycle Time–Read

ECSPI_SCLK Cycle Time–Write

tclk

—ns

CS2 ECSPIx_SCLK High or Low Time–Read

ECSPIx_SCLK High or Low Time–Write

tSW

21.5

—ns

CS4 ECSPIx_SS_B pulse width

tCSLH

Half ECSPIx_SCLK period

—

CS5 ECSPIx_SS_B Lead Time (CS setup time)

tSCS

5—

CS6 ECSPIx_SS_B Lag Time (CS hold time)

tHCS

5—

CS7 ECSPIx_MOSI Setup Time

tSmosi

4—

CS8 ECSPIx_MOSI Hold Time

tHmosi

4—

CS9 ECSPIx_MISO Propagation Delay (CLOAD =20pF)

tPDmiso

419

CS1

CS7

CS8

CS2

CS4

CS6

CS5

CS9

ECSPIx_SCLK

ECSPIx_SS_B

ECSPIx_MISO

ECSPIx_MOSI

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