ZL2005P datasheet(7/41 Pages) RENESAS

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ZL2005P

FN6849 Rev 3.00

Page 7 of 41

December 16, 2011

Pin Descriptions

Figure 2. Pin Assignments (top view)

Table 4. Pin Descriptions

Label

Type1

Description

DGND

PWR

Digital ground. Connect to low impedance ground plane.

SYNC

I/O, M2

Clock synchronization input. Used to set the frequency of the internal switch

clock, to sync to an external clock or to output internal clock.

3SA0

I, M

Serial address select pins. Used to assign unique address for each individual

device or to enable certain management features.

4SA1

5ILIM0

I, M

Current limit select. Sets the overcurrent threshold voltage for ISENA, ISENB.

6ILIM1

SCL

I/O

Serial clock. Connect to external host and/or to other ZL2005s.

SDA

I/O

Serial data. Connect to external host and/or to other ZL2005s.

SALRT

Serial alert. Connect to external host if desired.

FC0

Loop compensation selection pins.

FC1

I, M

Output voltage selection pins. Used to set VOUT setpoint and VOUT max.

UVLO

I, M

Undervoltage lockout selection. Sets the minimum value for VDD voltage to

enable VOUT.

SS0

I, M

Soft start pins. Set the output voltage ramp time during turn-on and turn-off.

SS1

VTRK

Tracking sense input. Used to track an external voltage source.

NOTES:

1. I = Input, O = Output, PWR = Power or Ground, M = Multi-mode pin (refer to Section 4.5, “Multi-mode Pins,” )

2. The SYNC pin can be used as a logic pin, a clock input or a clock output.

3. VDD is measured internally and the value is used to modify the PWM loop gain.

SA1

ILIM0

ILIM1

SCL

SDA

SALRT

DGND

SA0

SYNC

36-Pin QFN

6 x 6 mm

PGND

ISENA

ISENB

VDD

BST

Exposed Paddle

Connect to SGND

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