| Electronic Components Datasheet Search |
|
SSC2016S Datasheet(PDF) 12 Page - Sanken electric |
|
|
|||||||||||||||||||||||||||||
SSC2016S Datasheet(HTML) 12 Page - Sanken electric |
|
12 / 22 page ![]() SSC2016S SSC2016S - DSJ Rev.1.3 SANKEN ELECTRIC CO.,LTD. 12 Jul. 22, 2016 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO.,LTD. 2015 OSC VOUT GND 6 1.40V /0.70V OUT 7 DFW T1 Q1 R1 ZCD 5 CT 2 C6 C4 U1 RCS C1 D P VP VD Figure 8-9. ZCD Pin Peripheral Circuit 0 0 0 OUT pin voltage Primary winding P voltage, VP Auxiliary winding D voltage, VD ZCD pin voltage Drain to Source voltage, VDS Drain current, ID Inductor current, IL L H L H L Turn-on point Turn-on delay time VZCD(H) VZCD(L) Figure 8-10. Zero Current Detection Waveform tDLY Bottom-on Free oscillation Delay time is short. Make R1 or C6 value larger. Delay time is Long. Make R1 or C6 value smaller. Proper delay time Figure 8-11. VDS Turn On Timing 8.6 Maximum Switching Frequency Limitation Function In the CRM operation, the switching frequency of a power MOSFET is varied in a period of sinusoidal AC input voltage. The switching frequency is lowest in the peak of AC input voltage and is high as getting close to the bottom of it. In addition, when output load decreases, the switching frequency increases entirely. In order to reduce the switching loss, the IC has the Maximum Switching Frequency Limitation Function that limits the switching frequency to fMAX of 300 kHz. 8.7 Overcurrent Protection (OCP) Figure 8-12 shows the CS pin peripheral circuit and internal circuit. The inductor current, IL is detected by the detection resistor, RCS. The detection voltage, VRCS, is fed into CS pin. As shown in Figure 8-12, the CS pin is connected to capacitor-resistor filter (R5 and C5). The IC has two Overcurrent Protection (OCP) threshold voltages. ● OCP1 When VRCS increases VCS(OCP1) = 0.500 V or more, the output of the OUT pin becomes Low by pulse-by-pulse. ● OCP2 OCP2 is activated by malfunctions such as the short of a boost diode, DFW. If the instantaneous large current flows to a power MOSFET and the CS pin voltage increases to VCS(OSP2) = 1.50 V or more and this operation continues seven times, the output of OUT pin is latched to low level. Releasing the latched state is done by turning off the input voltage and by dropping VCC pin voltage below VCC(OFF). VOUT GND 6 OUT 7 DFW T1 Q1 RCS CS 4 R5 C5 VCS(OCP1) = 0.500V OCP1 C2 U1 P D VRCS VCS(OCP2) = 1.5V OCP2 Figure 8-12. The CS Pin Peripheral Circuit and Internal Circuit. |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |