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AD9144BCPZ Datasheet(PDF) 79 Page - Analog Devices |
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AD9144BCPZ Datasheet(HTML) 79 Page - Analog Devices |
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79 / 125 page ![]() Data Sheet AD9144 Rev. B | Page 79 of 125 ANALOG OUTPUTS TRANSMIT DAC OPERATION Figure 80 shows a simplified block diagram of the transmit path DACs. The DAC core consists of a current source array, a switch core, digital control logic, and full-scale output current control. The DAC full-scale output current (IOUTFS) is nominally 20.48 mA. The output currents from the OUTx± pins are complementary, meaning that the sum of the two currents always equals the full- scale current of the DAC. The digital input code to the DAC determines the effective differential current delivered to the load. OUT3+ OUT3– OUT2+ OUT2– OUT1+ OUT1– OUT0+ OUT0– CURRENT SCALING Q DACs FULL-SCALE ADJUST I DACs FULL-SCALE ADJUST 1.2V 4kΩ I120 DAC3 DAC2 DAC1 DAC0 Figure 80. Simplified Block Diagram of DAC Core The DAC has a 1.2 V band gap reference. A 4 kΩ external resistor, RSET, must be connected from the I120 pin to the ground plane. This resistor, along with the reference control amplifier, sets up the correct internal bias currents for the DAC. Because the full-scale current is inversely proportional to this resistor, the tolerance of RSET is reflected in the full-scale output amplitude. DACFSC_x (where x is a number from 0 to 3 that corresponds to DAC0 through DAC3) is a 10-bit twos complement value that controls the full-scale current of each of the four DAC outputs. These values are stored in Register 0x040 to Register 0x047, as shown in Table 84. The typical full-scale current for each DAC is given by: IOUTFS = 20.45 + (DACFSC_x × 6.55 mA)/2(10− 1) For nominal values of VREF (1.2 V), RSET (4 kΩ), and DACFSC_x (0, which is midscale in twos complement), the full-scale current of the DAC is typically 20.48 mA. The DAC full-scale current can be adjusted from 13.9 mA to 27.0 mA, by programming the appropriate DACFSC_x values in Register 0x040 to Register 0x047. Analog output full-scale current vs. DAC gain code is plotted in Figure 81. Table 84. DAC Full-Scale Current Registers Address Value Description 0x040[1:0] DACFSC_0[9:8] Dual A I DAC MSB gain code 0x041[7:0] DACFSC_0[7:0] Dual A I DAC LSB gain code 0x042[1:0] DACFSC_1[9:8] Dual A Q DAC MSB gain code 0x043[7:0] DACFSC_1[7:0] Dual A Q DAC LSB gain code 0x044[1:0] DACFSC_2[9:8] Dual B I DAC MSB gain code 0x045[7:0] DACFSC_2[7:0] Dual B I DAC LSB gain code 0x046[1:0] DACFSC_3[9:8] Dual B Q DAC MSB gain code 0x047[7:0] DACFSC_3[7:0] Dual B Q DAC LSB gain code 28 –512 512 384 256 128 0 GAIN DAC CODE –128 –256 –384 26 24 22 20 18 16 14 12 Figure 81. DAC Full-Scale Current (IOUTFS) vs. DAC Gain Code Transmit DAC Transfer Function The output currents from the OUTx+ and OUTx− pins are complementary, meaning that the sum of the positive and negative currents always equals the full-scale current of the DAC. The digital input code to the DAC determines the effective differential current delivered to the load. OUTx± provides the maximum output current when all bits are high for binary data. The output currents vs. DACCODE for the DAC outputs using binary format are expressed as OUTFS N BIN OUTP I DACCODE I × − = 1 2 (5) OUTP OUTFS OUTN I I I − = (6) where DACCODEBIN is the 16-bit input to the DAC in unsigned binary. DACCODEBIN has a range of 0 to 2N − 1. If the data format is twos complement, the output currents are expressed as OUTFS N N TWOS OUTP I DACCODE I × − + = − 1 2 2 1 (7) OUTP OUTFS OUTN I I I − = (8) where DACCODETWOS is the 16-bit input to the DAC in twos complement. DACCODETWOS has a range of −2N− 1 to 2N − 1 − 1. |
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