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AD9144BCPZ Datasheet(PDF) 88 Page - Analog Devices

Part # AD9144BCPZ
Description  Digital-to-Analog Converter
PDF  125 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9144BCPZ Datasheet(HTML) 88 Page - Analog Devices

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AD9144
Data Sheet
Rev. B | Page 88 of 125
Reg.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
R/W
0x112
INTERP_MODE
RESERVED
INTERP_MODE
0x01
R/W
0x113
NCO_FTW_
UPDATE
RESERVED
FTW_UPDATE_
ACK
FTW_
UPDATE_
REQ
0x00
R/W
0x114
FTW0
FTW[7:0]
0x00
R/W
0x115
FTW1
FTW[15:8]
0x00
R/W
0x116
FTW2
FTW[23:16]
0x00
R/W
0x117
FTW3
FTW[31:24]
0x00
R/W
0x118
FTW4
FTW[39:32]
0x00
R/W
0x119
FTW5
FTW[47:40]
0x10
R/W
0x11A NCO_PHASE_
OFFSET0
NCO_PHASE_OFFSET[7:0]
0x00
R/W
0x11B
NCO_PHASE_
OFFSET1
NCO_PHASE_OFFSET[15:8]
0x00
R/W
0x11C PHASE_ADJ0
PHASE_ADJ[7:0]
0x00
R/W
0x11D PHASE_ADJ1
RESERVED
PHASE_ADJ[12:8]
0x00
R/W
0x11F
TXEN_SM_0
FALL_COUNTERS
RISE_COUNTERS
RESERVED
PROTECT_OUT_
INVERT
RESERVED
0x83
R/W
0x121
TXEN_RISE_
COUNT_0
RISE_COUNT_0
0x0F
R/W
0x122
TXEN_RISE_
COUNT_1
RISE_COUNT_1
0x00
R/W
0x123
TXEN_FALL_
COUNT_0
FALL_COUNT_0
0xFF
R/W
0x124
TXEN_FALL_
COUNT_1
FALL_COUNT_1
0xFF
R/W
0x12D DEVICE_CONFIG_
REG_0
DEVICE_CONFIG_0
0x46
R/W
0x12F
DIE_TEMP_CTRL0
RESERVED
AUXADC_
ENABLE
0x20
R/W
0x132
DIE_TEMP0
DIE_TEMP[7:0]
0x00
R
0x133
DIE_TEMP1
DIE_TEMP[15:8]
0x00
R
0x134
DIE_TEMP_
UPDATE
RESERVED
DIE_TEMP_
UPDATE
0x00
R/W
0x135
DC_OFFSET_CTRL
RESERVED
DC_OFFSET_
ON
0x00
R/W
0x136
IPATH_DC_
OFFSET_1PART0
LSB_OFFSET_I[7:0]
0x00
R/W
0x137
IPATH_DC_
OFFSET_1PART1
LSB_OFFSET_I[15:8]
0x00
R/W
0x138
QPATH_DC_
OFFSET_1PART0
LSB_OFFSET_Q[7:0]
0x00
R/W
0x139
QPATH_DC_
OFFSET_1PART1
LSB_OFFSET_Q[15:8]
0x00
R/W
0x13A IPATH_DC_
OFFSET_2PART
RESERVED
SIXTEENTH_OFFSET_I
0x00
R/W
0x13B
QPATH_DC_
OFFSET_2PART
RESERVED
SIXTEENTH_OFFSET_Q
0x00
R/W
0x13C IDAC_DIG_GAIN0
IDAC_DIG_GAIN[7:0]
0xEA
R/W
0x13D IDAC_DIG_GAIN1
RESERVED
IDAC_DIG_GAIN[11:8]
0x0A
R/W
0x13E
QDAC_DIG_
GAIN0
QDAC_DIG_GAIN[7:0]
0xEA
R/W
0x13F
QDAC_DIG_GAIN1
RESERVED
QDAC_DIG_GAIN[11:8]
0x0A
R/W
0x140
GAIN_RAMP_UP_
STEP0
GAIN_RAMP_UP_STEP[7:0]
0x04
R/W



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