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SCD1284 Datasheet(PDF) 173 Page - Intel Corporation |
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SCD1284 Datasheet(HTML) 173 Page - Intel Corporation |
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173 / 176 page ![]() Datasheet 173 Index A A_1284 19 AB[6:0] 19 abbreviations 15 acronyms 15 AkDaRq 19 asynchronous serial data protocol 50 B baud rate derivation 102 generation 72 tables 103 bit engines 50 BYTESWAP 19, 75 C CCLK 20 CLK 19 CLK/2 19 common service acknowledge 42 compressed-data sequences 75 context 49 context switch 35 CPU interface 86 CS* 19 CTS* 55 CTS2* 20 CTS3* 20 D daisy-chaining 41 DB[15:0] 19 detailed register descriptions 108 device reset 90 DGRANT* 19 diagnostic facilities 73 DMA buffer 74 interface 34 transfers 74 DMAACK* 19 DMAREQ* 19 DPASS* 19 DS* 19 DSR* 55 DSR2* 20 DSR3* 20 DTACK* 19 DTR threshold 58 DTR* 55 DTR2* 20 DTR3* 20 E EBDIR 19 ECP mode 74 embedded transmit commands (ETC) 67 endian 35 EPP mode 79, 83 F failed negotiation 81 Fair Share 41 fairness override 43 FIFO threshold 50 flow control 55 G general-purpose I/O port 83 global function initialization 93 GND 18 GP[7:0] 19 |
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