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AXP288 Datasheet(PDF) 42 Page - Shenzhen X-Powers Technology Co ., Ltd

Part # AXP288
Description  PMIC Optimized For Multi-Core High-Performance System
PDF  110 Pages
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Manufacturer  XPOWER [Shenzhen X-Powers Technology Co ., Ltd]
Direct Link  http://www.x-powers.com/en.php/Index/index
Logo XPOWER - Shenzhen X-Powers Technology Co ., Ltd

AXP288 Datasheet(HTML) 42 Page - Shenzhen X-Powers Technology Co ., Ltd

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AXP288
PMIC Optimized For Multi-Core High-Performance System
AXP288 Datasheet V1.06
Copyright © 2014 X-Powers Limited. All Rights Reserved.
42
Table 9-16
Parameter
Description
Min
Typical
Max
Units
T0
SLP_S0IX_B de-assertion to first
SX rail starts to turn on
0
100
μs
T1
Rail Ramp-Up Time from 10% to
90% voltage level
0.08
1
ms
T2
Rail to Subsequent Rail Turn-On
Delay
1
ms
T3
Total S0IX exit latency: from
SLP_S0IX_B de-assertion to all
VRs are within its specified
tolerance
0.2
4.1
ms
CHT Standby entry and exit sequence
VSLEEP
Buck2 - VNN
Buck1 - VCC
Buck5 - VGG
VSLEEP
SLP_S0IX_B
Buck3 -V1P05A/
V1P15
CHT enter Standby Sequence
Signals from SoC
T0
T1
T2
T3
Figure 9-17
Table 9-17
Parameter
Description
Min
Typical
Max
Units
T0
SLP_S0IX_B assertion to voltage
rail starts to ramp down
0
100
μs
T1
VR rail ramp-down time from 90%
to 10% voltage level for all VRs
unless specified otherwise
0.01
1
3.0
ms
T2
VR to subsequent VR turn-off
delay for all VRs unless specified
otherwise
0.1
1
3.0
ms
T3
Ramp down slew rate for BUCK3
to VSLEEP voltage
2.5
10
mv/μs



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