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CN708 Datasheet(PDF) 5 Page - Shanghai Consonance Electronics Incorporated |
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CN708 Datasheet(HTML) 5 Page - Shanghai Consonance Electronics Incorporated |
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5 / 14 page ![]() CONSONANCE Pin Description: Pin No. CN705 CN706X CN707 CN708X CN813X CN706P Name Function Description 1 1 1 MR Manual reset input. When voltage at is pulled low, a reset pulse will be triggered. The active low input has a pull up current. It can be driven by TTL or CMOS logic as well as shorted to GND with a switch. 2 2 2 VCC Positive supply input 3 3 3 GND Negative supply input 4 4 4 PFI Power fail monitor input. When the voltage at PFI is below 1.22V,PFO goes low . Connect PFI to GND or VCC when not used. 5 5 5 PFO Power fail monitor output. When the voltage at PFI is less than 1.22V, PFO goes low; otherwise PFO goes high. 6 6 WDI Watchdog input. If WDI remains high or low for 1.6s, the on chip watchdog timer runs out and WDO goes low. Floating WDI or connecting WDI to high impedance three state buffer disables watchdog function. The watchdog timer clears whenever RESET is asserted, or WDI is three stated, or WDI sees a rising or falling edge. 7 7 RESET Active low reset output. stays in low if VCC is lower than reset threshold; it remains in low for 200ms after VCC becomes higher than reset threshold or goes from low to high.(Figure 5) 8 8 WDO Watchdog output. WDO goes low if watchdog timer finishes its 1.6s count, and will not go high again until the watchdog timer is cleared. Whenever VCC is below reset threshold, WDO stays low, and as soon as VCC rises above reset threshold, WDO goes high without delay. 8 7 RESET Active high reset output. RESET stays in high if VCC is lower than reset threshold; it remains in high for 200ms after VCC becomes higher than reset threshold or goes from low to high.(Figure 5) Rev.1 5 |
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