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CN708 Datasheet(PDF) 9 Page - Shanghai Consonance Electronics Incorporated |
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CN708 Datasheet(HTML) 9 Page - Shanghai Consonance Electronics Incorporated |
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9 / 14 page ![]() CONSONANCE reset pulse, the pulse will continue for at least another 140ms. On power down , once VCC falls below reset threshold, RESET stays valid and is guaranteed in the correct logic state until VCC drops below 1.15V for the whole temperature range. Please refer to Figure 5. CN705/706 series provide active low signal;CN707/708 series provide both active high and active low RESET signals;CN813 series provide active high RESET signal. Watchdog Timer CN705/706/813 series have an independent watchdog timer that can monitor uP’s activity. If uP does not toggle the watchdog input (WDI) within 1.6s and WDI is not three-stated, WDO goes low. As long as RESET is asserted, or WDI is three-stated, or WDI is left floating, the watchdog timer stays cleared and will not count, in this case WDO is in high state. When VCC stays below reset threshold, WDO goes low whether or not the watchdog timer has timed out yet. Please refer to figure 4. Manual Reset Manual reset input allows reset signal to be triggered by push button or switch. The push button or switch is effectively debounced by 140ms minimum reset pulse width. is TTL/CMOS logic compatible. can be used to force a watchdog timeout to generate a reset pulse in CN705/706/813 series by connecting WDO to Please refer to Figure 5. Power fail Comparator The power fail comparator can be used for various purpose because its output and noninverting input are not internally connected. The inverting input is internally connected to a 1.22V reference voltage. WDI WDO RESET RESET Note 1: RESET (RESET) is triggered by MR Note 2: RESET is for CN813X and CN706P only Figure 4 Watchdog Timing tWD tWD tWD tRES Rev.1 9 |
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