MSM7630 datasheet(44/95 Pages) OKI

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MSM7630

¡ Semiconductor

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5.9 Return From Interrupt

In order to return from an interrupt process caused by an exception, external interrupt, or software

trap, the pipeline at the time of the interrupt must be regenerated before execution.

There are two types of returns: (1) re-execution of an instruction that was in its execution phase at

the time an exception, external interrupt, or asynchronous trap caused an interrupt, and (2) re-

execution of the instruction after the instruction that was in its execution phase at the time a software

trap caused an interrupt. However, if breakpoints are supported by software traps then case (1)

applies.

The return sequence from an interface process is described below.

Also, an rt instruction must not be executed while the EM bit of %PSR is 1 (the state permitting

overlapping interrupts). If an interrupt occurred during the rt instruction in such a case, then the

contents of %PSR would be corrupted.

1. Resume from interrupted instruction

brst

%psr, 4, %psr

; EM-bit reset

jlr

%r1, %nop

; delay slot, branch %r1 (old %PC),

; return address not saved

%r2

; return to %r2 (old %nPC), %prPSR move to %PSR

2. Return from instruction after interrupt

add

%r2, 4, %r1

; %r2+4 (old %nPC+4)Æ%r1

brst

%psr, 4, %psr

; EM-bit reset

jlr

%r2, %nop

; delay slot, branch %r2 (old %nPC), return address not saved

%r1

; return to %r1 (old %nPC+4), %prPSR move to %PSR

In this case the pNOP bit of %prPSR must be cleared in advance of rt instruction execution. If the

pNOP bit of %prPSR is set and then the rt instruction is executed, then the instruction at the return

point would not be executed.

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