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VR5100 Datasheet(PDF) 65 Page - NXP Semiconductors

Part # VR5100
Description  Multi-output DC/DC regulator for low-power LS1 communication processors
PDF  108 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

VR5100 Datasheet(HTML) 65 Page - NXP Semiconductors

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NXP Semiconductors
65
VR5100
FUNCTIONAL DESCRIPTION AND APPLICATION INFORMATION
CONTROL INTERFACE I2C BLOCK DESCRIPTION
6.6.5.3.6
Interrupt sense register 1 (INTSENSE1)
This register has four read-only sense bits. These sense bits reflect the actual state of the corresponding function.
Table 100. INTMASK1 field descriptions
Field
Description
4
SW3FAULTM
SW3 overcurrent interrupt mask bit
0
SW3FAULTI Unmasked
1
SW3FAULTI Masked
3
SW2FAULTM
SW2 overcurrent interrupt mask bit
0
SW2FAULTI Unmasked
1
SW2FAULTI Masked
1
SW1FAULTM
SW1 overcurrent interrupt mask bit
0
SW1FAULTI Unmasked
1
SW1FAULTI Masked
0
SW1FAULTM
SW1 overcurrent interrupt mask bit
0
SW1FAULTI Unmasked
1
SW1FAULTI Masked
Table 101. Interrupt sense register 1 (INTSENSE1)
Address: 0x0A functional page
Access: user read-only (62)
7
654
32
10
R
SW3FAULTS
SW2FAULTS
SW1FAULTS
SW1FAULTS
W
Default
0
0
0
X (63)
X (63)
0X (63)
X (63)
= Unimplemented or reserved
Notes
62.
Read: Anytime
63.
Default value depends on the regulator initial state
Table 102. INTSENSE1 field descriptions
Field
Description
4
SW3FAULTS
SW3 overcurrent sense bit
0
SW3 in normal operation
1
SW3 above current limit
3
SW2FAULTS
SW2 overcurrent sense bit
0
SW2 in normal operation
1
SW2 above current limit
1
SW1FAULTS
SW1 overcurrent sense bit
0
SW1 in normal operation
1
SW1 above current limit
0
SW1FAULTS
SW1 overcurrent sense bit
0
SW1 in normal operation
1
SW1 above current limit



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