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VR5100 Datasheet(PDF) 96 Page - NXP Semiconductors

Part # VR5100
Description  Multi-output DC/DC regulator for low-power LS1 communication processors
PDF  108 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

VR5100 Datasheet(HTML) 96 Page - NXP Semiconductors

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96
NXP Semiconductors
VR5100
FUNCTIONAL DESCRIPTION AND APPLICATION INFORMATION
CONTROL INTERFACE I2C BLOCK DESCRIPTION
CC
OTP LDO2
VOLT
R/W
8'b0000_xxxx
OTP_LDO2_VOLT[3:0]
0
0
0
0
xxx
x
CD
OTP LDO2
SEQ
R/W
8'b0000_xxxx
OTP_LDO2_SEQ[3:0]
0
0
0
0
xxx
x
D0
OTP VSD
VOLT
R/W
8'b0000_xxxx
–
OTP_VSD_VOLT[2:0]
0
0
0
0
xxx
x
D1
OTP VSD SEQ
R/W
8'b0000_xxxx
OTP_VSD_SEQ[2:0]
000
0
0
x
x
x
D4
OTP V33
VOLT
R/W
8'b0000_xxxx
OTP_V33_VOLT[2:0]
0
0
0
0
xxx
x
D5
OTP V33 SEQ
R/W
8'b0000_xxxx
OTP_V33_SEQ[3:0]
0
0
0
0
xxx
x
D8
OTP LDO3
VOLT
R/W
8'b0000_xxxx
OTP_LDO3_VOLT[3:0]
0
0
0
0
xxx
x
D9
OTP LDO3
SEQ
R/W
8'b0000_xxxx
OTP_LDO3_SEQ[3:0]
0
0
0
0
xxx
x
DC
OTP LDO4
VOLT
R/W
8'b0000_xxxx
OTP_LDO4_VOLT[3:0]
0
0
0
0
xxx
x
DD
OTP LDO4
SEQ
R/W
8'b0000_xxxx
OTP_LDO4_SEQ[3:0]
0
0
0
0
xxx
x
E0
OTP PU
CONFIG1
R/W
8'b000x_xxxx
OTP_EN_CFG
OTP_SWDVS
_CLK
OTP_SEQ_CL
K_SPEED
xxxx
xxx
x
E4
OTP FUSE
POR1
R/W
8'b0000_00x0
TBB_POR
–
–
––––
–
000
000
x
0
E5
RSVD
R/W
8'b0000_00x0
––
–
–––
–
000
000
0
E6
RSVD
R/W
8'b0000_00x0
––
–
–––
–
000
000
0
E7
RSVD
R
8'b0000_00x0
––
–
–––
–
000
000
0
E8
OTP PWRGD
EN
R/W/M
8'b0000_000x
–
––
––––
OTP_PG_EN
000
000
x
0
F0
RSVD
R/W
8'b000x_xxxx
–––
0
0
0
x
xxx
x
F1
RSVD
R/W
8'b000x_xxxx
–––
0
0
0
x
xxx
x
Table 179. Extended page 1 (continued)
Address
Register
Name
TYPE
Default
BITS[7:0]
7
6
5
4
3
2
1
0



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