ADV7330KST datasheet(63/76 Pages) AD

63 / 76 page

REV. B

ADV7330

–63–

Mode 1—Master Option

(Timing Register 0 TR0 = X X X X X 0 1 1)

In this mode, the ADV7330 can generate horizontal sync and

odd/even field signals. A transition of the field output when

HSYNC_O/P is low indicates a new frame i.e., vertical retrace.

The blank signal is optional. Pixel data is latched on the rising

clock edge following the timing signal transitions.

HSYNC is

output on the

HSYNC_O/P pin, BLANK on the BLANK_O/P

pin, and Field on the

VSYNC_O/P pin.

622

623

624

625

1234

DISPLAY

VERTICAL BLANK

ODD FIELD

EVEN FIELD

FIELD

DISPLAY

309

310

311

312

313

314

315

316

317

318

319

334

335

336

DISPLAY

VERTICAL BLANK

ODD FIELD

EVEN FIELD

DISPLAY

320

HSYNC_O/P

BLANK_O/P

HSYNC_O/P

BLANK_O/P

FIELD

Figure 74. SD Slave Mode 1 (PAL)

FIELD

PIXEL

DATA

PAL = 12

CLOCK/2

NTSC = 16

CLOCK/2

PAL = 132

CLOCK/2

NTSC = 122

CLOCK/2

HSYNC_O/P

BLANK_O/P

Figure 75. SD Timing Mode 1—Odd/Even Field Transitions Master/Slave

ADV7330KST Datasheet(PDF) 63 Page - Analog Devices

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