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ADV7330KST Datasheet(PDF) 22 Page - Analog Devices

Part # ADV7330KST
Description  Multiformat 11-Bit Triple DAC Video Encoder
PDF  76 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7330KST Datasheet(HTML) 22 Page - Analog Devices

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REV. B
–22–
ADV7330
SR7–
SR0
Register
Bit Description
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register Setting
Reset
Values
44h
SD Mode Register 3
SD VSYNC-3H
0
Disabled
00h
1
VSYNC = 2.5 Lines (PAL)
VSYNC = 3 Lines (NTSC)
SD RTC/TR/SCR
*
00
Genlock Disabled
01
Subcarrier Reset
10
Timing Reset
11
RTC Enabled
SD Active Video Length
0
720 Pixels
1
710 (NTSC)/702 (PAL)
SD Chroma
0
Chroma Enabled
1
Chroma Disabled
SD Burst
0
Enabled
1
Disabled
SD Color Bars
0
Disabled
1
Enabled
SD DAC Swap
0
DAC B = Luma
DAC C = Chroma
1
DAC B = Chroma
DAC C = Luma
45h
Reserved
00h
46h
Reserved
00h
47h
SD Mode Register 4
SD PrPb Scale
0
Disabled
00h
1
Enabled
SD Y Scale
0
Disabled
1
Enabled
SD Hue Adjust
0
Disabled
1
Enabled
SD Brightness
0
Disabled
1
Enabled
SD Luma SSAF Gain
0
Disabled
1
Enabled
Reserved
0
0 must be written to this bit.
Reserved
0
0 must be written to this bit.
Reserved
0
0 must be written to this bit.
48h
SD Mode Register 5
Reserved
00 must be written to this bit.
Reserved
00 must be written to this bit.
SD Double Buffering
0
Disabled
1
Enabled
SD Input Format
0
8-Bit Input
1
16-Bit Input
Reserved
0
0 must be written to this bit.
SD Digital Noise Reduction
0
Disabled
1
Enabled
SD Gamma Control
0
Disabled
1
Enabled
SD Gamma Curve
0
Gamma Curve A
1
Gamma Curve B
49h
SD Mode Register 6
SD Undershoot Limiter
0
0
Disabled
00h
01
–11 IRE
10
–6 IRE
11
–1.5 IRE
Reserved
00 must be written to this bit.
SD Black Burst Output on DAC Luma
0
Disabled
1
Enabled
SD Chroma Delay
0
0
Disabled
01
4 Clk Cycles
10
8 Clk Cycles
11
Reserved
Reserved
0
0 must be written to this bit.
Reserved
0
0 must be written to this bit.
*See Figure 23, RTC Timing and Connections.



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