| Electronic Components Datasheet Search |
|
ADV7330KST Datasheet(PDF) 64 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADV7330KST Datasheet(HTML) 64 Page - Analog Devices |
|
64 / 76 page ![]() REV. B –64– ADV7330 Mode 2—Slave Option (Timing Register 0 TR0 = X X X X X 1 0 0) In this mode, the ADV7330 accepts horizontal and vertical sync signals. A coincident low transition of both HSYNC_I/P and VSYNC_I/P inputs indicates the start of an odd field. A VSYNC_I/P low transition when HSYNC_I/P is high indicates the start of an even field. The blank signal is optional. When the blank input is disabled, the ADV7330 automatically blanks all normally blank lines as per CCIR-624. HSYNC is input on the HSYNC_I/P pin, BLANK on the BLANK_I/P pin, and VSYNC on the VSYNC_I/P pin. 522 523 524 525 1234 5 678 9 10 11 20 21 22 DISPLAY DISPLAY VERTICAL BLANK ODD FIELD EVEN FIELD 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 283 284 285 ODD FIELD EVEN FIELD DISPLAY DISPLAY VERTICAL BLANK HSYNC_I/P BLANK_I/P VSYNC_I/P HSYNC_I/P BLANK_I/P VSYNC_I/P Figure 76. SD Slave Mode 2 (NTSC) 622 623 624 625 1234 5 67 21 22 23 DISPLAY VERTICAL BLANK ODD FIELD EVEN FIELD DISPLAY 309 310 311 312 313 314 315 316 317 318 319 334 335 336 DISPLAY VERTICAL BLANK ODD FIELD EVEN FIELD DISPLAY 320 HSYNC_I/P BLANK_I/P VSYNC_I/P HSYNC_I/P BLANK_I/P VSYNC_I/P Figure 77. SD Slave Mode 2 (PAL) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |